US 7,334,108 B1Granted

Multi-client virtual address translation system with translation units of variable-range size

AssigneeNVIDIA Corporation

InventorsColyn S. Case, Dmitry Vyshetsky, Sean J. Treichler

Life of this patent

Estimating the term…

Loading patent…

Abstract

A virtual address translation table and an on-chip address cache are usable for translating virtual addresses to physical addresses. Address translation information is provided using a cluster that is associated with some range of virtual addresses and that can be used to translate any virtual address in its range to a physical address, where the sizes of the ranges mapped by different clusters may be different. Clusters are stored in an address translation table that is indexed by virtual address so that, starting from any valid virtual address, the appropriate cluster for translating that address can be retrieved from the translation table. Recently retrieved clusters are stored in an on-chip cache, and a cached cluster can be used to translate any virtual address in its range without accessing the address translation table again.

Claims26

Dependent claims

A translation lookaside buffer system for translating virtual addresses to physical addresses, the system comprising:

an input arbitration module configured to receive translation requests from a plurality of clients, each translation request including a target virtual address, the input arbitration module further configured to select one of the translation requests for processing;
a primary cluster store having a plurality of locations, each location configured to store a cluster, wherein each cluster provides a mapping to a respective physical address for each virtual address in a range of virtual address space, wherein the respective ranges of different ones of the clusters have different sizes, and wherein each cluster includes a plurality of references to blocks of physical addresses such that the virtual addresses in the range mapped by the cluster are mapped to the blocks of physical addresses;
a primary lookup logic circuit coupled to receive the selected translation request from the input arbitration module and configured to associate one of the locations in the primary cluster store with the selected translation request, thereby designating the associated location for storing a target cluster whose range includes the target virtual address;
and
a translation module configured to translate the target virtual address of the selected translation request to a physical address based at least in part on the mapping provided by the cluster stored in the primary cluster store location associated with the selected translation request.

2 more elements

A method for translating virtual addresses to physical addresses, the method comprising the acts of:

defining a plurality of clusters, wherein each cluster provides a mapping to a respective physical address for each virtual address in a range of virtual address space, wherein respective sizes of the ranges mapped by different ones of the clusters are different, and wherein each cluster includes a plurality of references to blocks of physical addresses such that the virtual addresses in the range mapped by the cluster are mapped to the blocks of physical addresses;
receiving a first translation request from a client, the first translation request including a first target virtual address;
storing a first tag in a tag store, the first tag encoding a minimum size range of the virtual address space that includes the first target virtual address the first tag further identifying a first location in the primary cluster store;
associating the first request with the first location in the primary cluster store;
fetching a first cluster that maps a range of the virtual address space that includes the first target virtual address into the first location in the primary cluster store;
and
translating the first target virtual address to a physical address based at least in part on the mapping provided by the first cluster.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/769,388Filed 30 Jan 2004
Granted: 19 Feb 2008
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

G06F 12/1036
Using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]: for multiple virtual address spaces,…
G06F 12/1045
Using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]: associated with a data cache
G06F 2212/652
Details of virtual memory and virtual address translation: page size control
G06F 2212/654
Details of virtual memory and virtual address translation: look-ahead translation