Cycle-efficient TDM timeslot remapping for network processing engines
AssigneeIntel Corporation
InventorsDaniel G. Borkowski, Nancy S. Borkowski
Life of this patent
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Abstract
A method and apparatus for remapping channel data are presented. Multiple successive frames carrying data in timeslots are received. The timeslots are assigned to channels so that data for the channels includes interleaved data. The data from the multiple successive frames for each of a predetermined number of the timeslots are aggregated. The aggregated data is mapped, by timeslot, to produce a timeslot-based map. The aggregated data of the timeslot-based map is remapped to produce a channel-based map in which the data for the channels are grouped together by channel in the order that the data were received.
Claims31
A method comprising:
- receiving successive frames carrying data in timeslots, the timeslots being assigned to channels so that data for the channels comprises interleaved data;
- aggregating the data from successive frames for each of a predetermined number of the timeslots;
- mapping the aggregated data, by timeslot, to produce a timeslot-based map, the mapping comprising storing the aggregated data in a first buffer;
- and
- remapping the aggregated data in the timeslot-based map to produce a channel-based map by storing the aggregated data stored in the first buffer in a second buffer according to timeslot-remap information to re-order the aggregated data stored in the timeslot-based map, the timeslot-remap information comprising a table, and the table comprising an address and an increment value associated with each of the timeslots in a frame.
An article comprising:
- a storage medium having stored thereon instructions that when executed by a machine result in the following:
- for successive frames carrying data in timeslots assigned to channels so that data for the channels comprises interleaved data, aggregating the data from successive frames for each of a predetermined number of the timeslots;
- mapping the aggregated data, by timeslot, to produce a timeslot-based map, the mapping comprising storing the aggregated data in a first buffer;
- and
- remapping the aggregated data in the timeslot-based map to produce a channel-based map by storing the aggregated data stored in the first buffer in a second buffer according to timeslot-remap information to re-order the aggregated data stored in the timeslot-based map, the timeslot-remap information comprising a table, and the table comprising an address and an increment value associated with each of the timeslots in a frame, remapping comprising:
- reading bytes of aggregated data for the timeslot from the first buffer;
- determining a destination address in the second buffer according to the associated address in the table;
- and
- storing the first byte of the aggregated data for the timeslot in the second buffer at the destination address.
A processor comprising:
- a serial interface;
- a network processor engine of multiple execution threads coupled to the serial interface;
- wherein the serial interface is configured to process successive frames carrying data in timeslots, the timeslots assigned to channels so that data for the channels comprises interleaved data, the processing including aggregating the data from successive frames for each of a predetermined number of the timeslots and mapping the aggregated data, by timeslot, to produce a timeslot-based map;
- and
- wherein at least one of the multiple execution threads, during execution, operates to remap the aggregated data in the timeslot-based map to produce a channel-based map by storing aggregated data stored in a first buffer in a second buffer according to timeslot-remap information by using the timeslot-remap information to re-order the aggregated data stored in the timeslot-based map, the timeslot-remap information comprising a table, and the table comprising an address and an increment value associated with each of the timeslots in a frame;
- wherein to remap comprises:
- reading bytes of aggregated data for the timeslot from the first buffer;
- determining a destination address in the second buffer according to the associated address in the table;
- and
- storing the first byte of the aggregated data for the timeslot in the second buffer at the destination address.
A system comprising:
- a framer adapted to be coupled to a network;
- a network access device coupled to the framer, the network access device comprising a network processor;
- and
- the processor comprising:
- a serial interface;
- a network processor engine of multiple execution threads coupled to the serial interface;
- wherein the serial interface is configured to process successive frames carrying data in timeslots, the timeslots assigned to channels so that data for the channels comprises interleaved data, the processing including aggregating the data from successive frames for each of a predetermined number of the timeslots and mapping the aggregated data, by timeslot, to produce a timeslot-based map;
- and
- wherein at least one of the multiple execution threads, during execution, operates to remap the aggregated data in the timeslot-based map to produce a channel-based map by storing aggregated data stored in a first buffer in a second buffer according to timeslot-remap information by using the timeslot-remap information to re-order the aggregated data stored in the timeslot-based map, the timeslot-remap information comprising a table, and the table comprising an address and an increment value associated with each of the timeslots in a frame;
- wherein to remap comprises:
- reading bytes of aggregated data for the timeslot from the first buffer;
- determining a destination address in the second buffer according to the associated address in the table;
- and
- storing the first byte of the aggregated data for the timeslot in the second buffer at the destination address;
- incrementing the destination address by the associated increment value;
- and
- storing a next byte of the aggregated data for the timeslot in the second buffer at the incremented destination address.
A method comprising:
- mapping aggregated data, by timeslot, to produce a timeslot-based map, the mapping comprising storing the aggregated data in a first buffer;
- and
- remapping the aggregated data in the timeslot-based map to produce a channel-based map by storing the aggregated data stored in the first buffer in a second buffer according to timeslot-remap information to re-order the aggregated data stored in the timeslot-based map, the timeslot-remap information comprising a table, and the table comprising an address and an increment value associated with each of the timeslots in a frame, remapping comprising:
- reading bytes of aggregated data for the timeslot from the first buffer;
- determining a destination address in the second buffer according to the associated address in the table;
- storing the first byte of the aggregated data for the timeslot in the second buffer at the destination address;
- incrementing the destination address by the associated increment value;
- storing a next byte of the aggregated data for the timeslot in the second buffer at the incremented destination address;
- and
- repeating the incrementing and the storing a next byte until all of the bytes of the aggregated data for the timeslot have been stored in the second buffer.
Dependencies are inferred from the claim text.