Analog I/O with digital signal processor array

A method for performing digital signal processing in a programmable logical semiconductor device, comprising:

• providing a plurality of processor blocks disposed in an array, at least one of said processor blocks dedicated to implementing digital signal processing functions;
• providing an analog signal processing and analog input/output structure coupled to said array, said input/output structure configured for routing signals to said processor blocks in said array via an analog signal processor that is configurable as a switched capacitor filter free of any intervening analog component, wherein at least one of said processor blocks is dedicated to implementing digital signal processing functions;
• providing an interconnect matrix between said processor blocks;
• selecting one or more of said processor blocks to perform a digital processing function;
• selecting one or more input and output connections in said input/output structure;
• selecting an interconnection configuration in said interconnect matrix;
• and storing selections in an accessible register in said programmable logical semiconductor device.