Method to form ultra high quality silicon-containing compound layers

A method of forming a layer, of an insulating silicon compound, having a desired thickness for an integrated circuit, comprising:

• performing multiple chemical vapor deposition cycles in a reaction chamber, each cycle comprising:
• first, depositing a silicon layer on a substrate by exposing the substrate to a silicon source, wherein the silicon layer has a silicon layer thickness between about 3 Å and 25 Å, wherein depositing the silicon layer is performed under mass transport limited deposition conditions;
• and
• second, reacting the silicon layer to partially form the layer of an insulating silicon compound, wherein trisilane is the silicon source used to deposit a first silicon layer on the substrate in a first performance of a cycle of the plurality of cycles, wherein the silicon-containing compound layer has a thickness non-uniformity of about 5% or less and a step coverage of about 80% or greater.