Method for identifying semiconductor integrated circuit device, method for manufacturing semiconductor integrated circuit device, semiconductor integrated circuit device and semiconductor chip
AssigneesHitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
InventorMasaya Muranaka
Life of this patent
Estimating the term…
Abstract
In the manufacturing process of a semiconductor integrated circuit device, a plurality of identification elements having the same arrangement are formed and the relation of magnitude in a physical amount corresponding to variations in the process of the plurality of identification elements is employed as identification information unique to the semiconductor integrated circuit device.
Claims21
A method for identifying a semiconductor integrated circuit device, the method comprising the steps of:
- (a) providing a semiconductor integrated circuit device with a plurality of identification elements formed within a same semiconductor chip area, each said identification element having the same form and being formed using the same manufacturing process;
- (b) detecting information which reflects variations in electric parameters of said plurality of identification elements caused during said manufacturing process within the same semiconductor chip area, and
- (c) setting the information obtained in step (b) as unique identification information with respect to the semiconductor integrated circuit device.
A method for identifying a semiconductor integrated circuit device, comprising the steps of:
- (a) providing a semiconductor integrated circuit device with an identification information generator containing a plurality of identification elements, each said identification element including a logic circuit, said plurality of identification elements being formed within a same semiconductor chip area and each said identification element having the same form and constructed using the same manufacturing process, and
- (b) detecting information which reflects variations in electric parameters of the logic circuits caused during said manufacturing process within the same semiconductor chip area when said identification information generator is activated,
- wherein the information obtained by step (b) is related as unique identification information with respect to the semiconductor integrated circuit device.
A method for identifying a semiconductor integrated circuit device, comprising the steps of:
- (a) providing a semiconductor integrated circuit device with an identification information generator containing a plurality of identification elements, each said identification element including a logic circuit formed on a same semiconductor chip area and each said identification element having the same form and constructed using the same manufacturing process;
- and
- (b) comparing, when said identification information generator is activated, an output of one of said plurality of identification elements with an output of another of said plurality of identification elements, to provide information which reflects variations in electrical characteristics of said plurality of logic circuits caused during said manufacturing process,
- wherein the information obtained at step (b) is related as unique identification information with respect to the semiconductor integrated circuit device when said identification information generator is activated.
A method for identifying a semiconductor integrated circuit device, comprising the steps of:
- (a) preparing a semiconductor integrated circuit device provided with an identification generator containing a plurality of identification elements, each said identification element including a logic circuit, said plurality of identification elements being formed within a same semiconductor chip area and each said identification element having the same form and constructed using the same manufacturing process, the logic circuit in each said identification element being configured to have an output of the logic circuit electrically connected with an input of the logic circuit to output a voltage equal to a threshold voltage of the logic circuit as its electric parameter,
- (b) performing detection of information which reflects variations in said electric parameters of said logic circuits caused during said manufacturing process when said identification generator is activated;
- and
- (c) relating the information obtained by step (b) to the semiconductor integrated circuit device as unique identification information thereof.
A method for identifying particulars of a semiconductor integrated circuit device measured at one time of manufacturing thereof, comprising the steps of:
- (a) preparing a semiconductor integrated circuit device provided with an identification information generator containing a plurality of identification elements each including a logic circuit, said identification elements being formed on the same semiconductor chip area, and each of said plurality of identification elements configured to have the same form by treating each said identification element through the same manufacturing process;
- (b) at said one time of the process of manufacturing the semiconductor integrated circuit device, performing the steps of:
- (b1) performing a measurement with respect to said semiconductor integrated circuit device to provide information including particulars relating to the semiconductor integrated circuit device;
- (b2) performing detection of information which reflects variations in electrical characteristics of said logic circuits caused during said manufacturing process;
- and
- (b3) storing in a storing means said information including particulars relating to the semiconductor integrated circuit device by relating it to the information obtained at step (b2) as a reference, and
- (c) at another time later than said one time, performing the steps of:
- (c1) performing step (b2) to find said unique identification information;
- and
- (c2) retrieving said information including particulars relating to the semiconductor integrated circuit device from said storing means using the information found in step (c1) as the reference.
Dependencies are inferred from the claim text.