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US 7,279,924 B1Granted
Equalization circuit cells with higher-order response characteristics
AssigneeAltera Corporation
InventorSergey Yuryevich Shumarayev
Life of this patent
Estimating the term…
Abstract
Equalization circuitry includes additional components to boost the performance of the circuitry to a higher-order response. The additional components are preferably controllably variable so that the response can be adjusted to perform a wide range of equalization tasks. For example, the equalization circuitry can be used on signals received from connections having a wide range of signal propagation characteristics and/or on signals having a wide range of data rates, including data rates that can be very high.
Claims24
Equalization circuitry comprising:
- a first resistor, a first transistor, and a first current source connected in series;
- an input node connected to a gate of the first transistor;
- an output node connected between the first resistor and the first transistor;
- a first coupling capacitor connected between the input node and a bias node of the first current source, the coupling capacitor creating a change in current through the transistor in response to a change in voltage at the input node;
- a second transistor, complementary to the first transistor, wherein the second transistor is coupled to a node between the first transistor and the first current source;
- a second current source connected in series to the second transistor;
- and
- a second coupling capacitor connected between a gate of the second transistor and a bias node of the second current source.
5 more elements
Equalization circuitry comprising:
- a resistor, a transistor, and a current source connected in series;
- an input node connected to a gate of the transistor;
- an output node connected between the resistor and the transistor;
- a coupling capacitor connected between the input node and a bias node of the current source;
- a second resistor, a second transistor, and a second current source connected in series;
- a complementary input node connected to a gate of the second transistor;
- a complementary output node connected between the second resistor and the second transistor;
- and
- a second coupling capacitor connected between the complementary input node and a bias node of the second current source.
6 more elements
Equalization circuitry comprising:
- a first resistor, a first transistor, and a first current source transistor connected in series;
- a second resistor, a second transistor, and a second current source transistor connected in series;
- a capacitor connected between a first node between the first transistor and the first current source transistor and a second node between the second transistor and the second current source transistor;
- an input node connected to a gate of the first transistor;
- a complementary input node connected to a gate of the second transistor;
- an output node connected between the second resistor and the second transistor;
- a complementary output node connected between the first resistor and the first transistor;
- bias source circuitry connected to a gate of the first current source transistor and to a gate of the second current source transistor;
- a first coupling capacitor connected between the input node and the gate of the first current source transistor;
- and
- a second coupling capacitor connected between the complementary input node and the gate of the second current source transistor.
8 more elements
Equalization circuitry comprising:
- a first series connection of a first resistor, a first transistor, and a first current source transistor;
- a second series connection of a second resistor, a second transistor, and a second current source transistor, the first and second series connections being parallel to one another;
- first and second complementary input nodes connected to gates of the first and second transistors, respectively;
- first and second complementary output nodes connected, respectively, between (1) the first resistor and the first transistor and (2) the second resistor and the second transistor;
- bias source circuitry connected to a gate of the first current source transistor and a gate of the second current source transistor;
- a variable capacitor connected between a first node between the first transistor and the first current source transistor and a second node between the second transistor and the second current source transistor;
- and
- first and second variable coupling capacitors connected, respectively, between the first and second input nodes and the gates of the first and second current source transistors.
5 more elements
Dependencies are inferred from the claim text.