Signal processing circuit for tuner which applies signal processing based on variation in frequency of intermediate frequency signal

A signal processing circuit for a tuner which receives an input of an intermediate frequency signal produced by mixing a received broadcast signal and a local oscillator frequency signal produced by a first local oscillator and detects and demodulates the intermediate frequency signal, the signal processing circuit comprising:

• a signal detector, operating based on a clock signal produced by a second local oscillator, for detecting the intermediate frequency signal;
• and
• a frequency variation detector for detecting a difference in frequency between a carrier of the intermediate frequency signal and the clock signal and for outputting an intermediate frequency variation signal, wherein
• the frequency variation detector comprises:
• a detector band pass filter for extracting a carrier of the intermediate frequency signal;
• a frequency counter for counting, based on the clock signal, a frequency of the carrier of the intermediate frequency signal which passes through the detector band pass filter;
• and
• an intermediate frequency variation signal outputting section for outputting the intermediate frequency variation signal based on a difference between the counted frequency and a frequency of the clock signal, and
• a frequency selection characteristic in operation of the signal processing circuit for a tuner is controlled based on the intermediate frequency variation signal.