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US 7,268,081 B2Granted
Wafer-level transfer of membranes with gas-phase etching and wet etching methods
AssigneeCalifornia Institute of Technology
InventorEui-Hyeok Yang
Life of this patent
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Abstract
Techniques for transferring a membrane from one wafer to another wafer to form integrated semiconductor devices. In one implementation, a carrier wafer is fabricated to include a membrane on one side of the carrier wafer. The membrane on the carrier wafer is then bond to a surface of a different, device wafer by a plurality of joints. Next, the carrier wafer is etched away by a dry etching chemical to expose the membrane and to leave said membrane on the device wafer. Transfer of membranes with a wet etching process is also described.
Claims16
A method, comprising:
- preparing a carrier wafer to have a support wafer made of a semiconductor material, a carrier passivation layer formed on a surface of the support wafer, and a membrane formed on the carrier passivation layer, wherein the carrier passivation layer is inert to a gaseous etchant that etches the semiconductor material;
- patterning a surface of a device wafer made from the semiconductor material to form a plurality of posts, each post having a top flat surface;
- forming a passivation layer on exterior surfaces of the device wafer without covering each top flat surface of each post;
- placing the carrier wafer on the device wafer to have the membrane directly contact top flat surfaces of the posts;
- forming a direct semiconductor-to-semiconductor bonding between the membrane and the top flat surfaces to bond the carrier wafer to the device wafer;
- exposing the bonded carrier wafer and the device wafer to the gaseous etchant to etch away the support wafer in the carrier wafer and to expose the carrier passivation layer;
- and
- removing the carrier passivation layer to transfer the membrane to the device wafer.
5 more elements
A method, comprising:
- preparing a carrier wafer to have a support wafer made of silicon, a carrier passivation layer formed on a surface of the support wafer, a membrane formed on the carrier passivation layer, and a plurality of posts on the membrane, wherein the carrier passivation layer is inert to a gaseous etchant that etches silicon;
- placing the carrier wafer on a device wafer to bond the posts to the device wafer;
- forming a passivation layer on exterior surfaces of the device wafer while leaving the support wafer exposed;
- exposing the bonded carrier wafer and the device wafer to the gaseous etchant to etch away the support wafer in the carrier wafer and to expose the carrier passivation layer;
- and
- removing the carrier passivation layer to transfer the membrane to the device wafer.
3 more elements
Dependencies are inferred from the claim text.