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US 7,257,795 B1Granted
Method and apparatus for facilitating effective and efficient optimization of short-path timing constraints
AssigneeAltera Corporation
InventorsRyan Fung, Michael Chan
Life of this patent
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Abstract
Methods and apparatuses are disclosed to facilitate routing between a first and second component in a programmable logic device to generate a path with an appropriate amount of delay to satisfy short-path timing constraints efficiently and effectively.
Claims34
A method for connecting a first and second component in a logic device, comprising:
- generating a path between the first and second components with an appropriate amount of delay to satisfy short-path timing constraints that define a minimum delay on the path by selecting an interconnect line from a plurality of interconnect lines, wherein each of the plurality of interconnect lines spans a same distance on the logic device but transmits a signal with a different delay.
A logic device, comprising:
- a first resource capable of driving a second resource wherein the first resource and the second resource span a same logical region and a same distance, wherein the first and second resources are routing resources having differing delay.
A method for connecting a first component to a second component in a logic device, comprising:
- determining minimum and maximum delay budgets for connections along a path between the first component and the second component that satisfy short-path and long-path timing constraints for the path;
- selecting a first interconnect line from a first plurality of interconnect lines in response to the minimum and maximum delay budgets, wherein each of the first plurality of interconnect lines spans a same distance on the logic device but transmits a signal with a different delay;
- selecting a second interconnect line from a second plurality of interconnect lines in response to the minimum and maximum delay budgets, wherein each of the second plurality of interconnect lines spans a same distance on the logic device but transmits a signal with a different delay;
- and
- connecting the first interconnect line with the second interconnect line to generate the path between the first component and the second component.
2 more elements
Dependencies are inferred from the claim text.