Content addressable memory with error signaling
AssigneeNetLogic Microsystems, Inc.
InventorsVaradarajan Srinivasan, Michael E. Ichiriu, Bindiganavale S. Nataraj, Sandeep Khanna
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Abstract
A content addressable memory (CAM) device including a CAM array, encoding circuit, address circuit and error checking circuit. The encoding circuit generates an address value that corresponds to one of a plurality of match lines included within the CAM array. The address circuit receives the address value from the encoding circuit and enables a data word to be output from a CAM array storage location indicated by the address value. The error checking circuit receives the data word output from the storage location and determines whether the data word contains an error.
Claims64
A content addressable memory (CAM) device comprising:
- a CAM array to store data words, compare the data words with a comparand value, and output a match signal that corresponds to a comparand-matching data word of the data words;
- a priority encoder coupled to receive the match signal from the CAM array and configured to output a match address that corresponds to the comparand-matching data word;
- an address circuit coupled to receive the match address from the priority encoder and configured to activate a word line that corresponds to a portion of the CAM array containing the comparand-matching data word, the word line, when activated, enabling the comparand-matching data word to be output from the CAM array;
- and
- an error detecting circuit coupled to receive the comparand-matching data word from the CAM array and configured to determine whether the comparand-matching data word has an error.
A content addressable memory (CAM) device comprising:
- a CAM array having a plurality of match lines;
- an encoding circuit coupled to the plurality of match lines and configured to generate an address value that corresponds to one of the plurality of match lines;
- circuitry coupled to receive the address value from the encoding circuit and configured to enable a data word to be output from a storage location within the CAM array indicated by the address value;
- and
- an error checking circuit coupled to receive the data word output from the storage location and configured to determine whether the data word contains an error.
A method of operation within a content addressable memory (CAM) device, the method comprising:
- outputting a match address from a priority encoder of the CAM device to an address circuit of the CAM device, the match address indicating a storage location within the CAM device that contains a data word determined to match a comparand value;
- and
- outputting the data word from the storage location indicated by the match address to an error checking circuit of the CAM device.
A method of operation within a content addressable memory device, the method comprising:
- determining that a first data value stored in a CAM array of the CAM device matches a comparand value;
- reading the first data value from the CAM array in response to determining that the first data value matches the comparand value;
- and
- checking the first data value read from the CAM array for error in response to determining that the first data value matches the comparand value.
A content addressable memory (CAM) device comprising:
- a CAM array having a plurality of storage locations and a plurality of match lines coupled respectively to the plurality of storage locations, the CAM array being configured to indicate a match condition on one of the plurality of match lines if a data value stored within a corresponding one of the plurality of storage locations is determined to match a comparand value;
- and
- circuitry coupled to the CAM array and configured to read the data value from the one of the plurality of storage locations and check the data value for error in response to the match condition.
A method of operation within a content addressable memory (CAM) device, the method comprising:
- generating a match address that indicates a storage location within the CAM device;
- generating an error signal having either a first state or a second state according to whether a data word read out of the storage location indicated by the match address is determined to contain an error;
- and
- concurrently outputting the match address and the error signal from the CAM device.
A method of operation within a content addressable memory (CAM) device, the method comprising:
- identifying storage locations containing respective data words determined to match a comparand value;
- generating a first match address that corresponds to a highest priority one of the storage locations;
- determining whether the data word stored in the highest priority one of the storage locations contains an error;
- and
- generating a second match address that corresponds to a second highest priority one of the storage locations if the data word stored in the highest priority one of the storage locations contains an error.
A content addressable memory (CAM) device comprising:
- means for storing a plurality of data words;
- means for determining that a first data word of the plurality of data words matches a comparand value;
- means for reading the first data word from the means for storing in response to determining that the first data word matches the comparand value;
- and
- means for checking the first data word, read from the means for storing for error in response to determining that the first data word matches the comparand value.
A content addressable memory (CAM) device comprising:
- means for storing a plurality of data words;
- means for generating a match address that indicates a storage location within the means for storing a plurality of data words;
- means for generating an error signal having either a first state or a second state according to whether a data word read out of the storage location indicated by the match address is determined to contain an error;
- and
- means for concurrently outputting the match address and the error signal from the CAM device.
A method of operation within a content addressable memory (CAM) device, the method comprising:
- comparing a comparand value with contents of a CAM array in a first compare operation;
- generating an address of a first storage location within the CAM array in response to the first compare operation;
- reading a data word from the first storage location;
- and
- comparing the comparand value with the data word read from the first storage location in a second compare operation.
A content addressable memory (CAM) device comprising:
- a CAM array coupled to receive a comparand value and configured to compare the comparand value with a plurality of data words;
- an address circuit coupled to the CAM array and configured to enable a first data word of the plurality of data words to be output from the CAM array;
- and
- a compare circuit coupled to receive the first data word output from the CAM array and the comparand value, the compare circuit being configured compare the comparand value and the first data word.
A content addressable memory (CAM) device comprising:
- a plurality of storage locations;
- means for simultaneously comparing a comparand value with contents of the plurality of storage locations in a first compare operation;
- means, responsive to the first compare operation, for generating an address that indicates one of the plurality of storage locations;
- means for reading a data word from the one of the plurality of storage locations indicated by the address;
- and
- means for comparing the comparand value with the data word read from the one of the storage locations in a second compare operation.
Dependencies are inferred from the claim text.