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US 7,257,686 B2Granted
Memory controller and method for scrubbing memory without using explicit atomic operations
AssigneeInternational Business Machines Corporation
InventorsPhilip Rogers Hillier, III, Joseph Allen Kirscht, Elizabeth A. McGlone
Life of this patent
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Abstract
A memory controller includes scrub circuitry that performs scrub cycles in a way that does not delay processor reads to memory during the scrub cycle. Atomicity of the scrub operation is assured by protocols set up in the memory controller, not by using an explicit atomic read-correct-write operation. The result is a memory controller that efficiently scrubs memory while minimizing the impact of scrub cycles on system performance.
Claims8
A method for scrubbing a memory, the method comprising the steps of:
- (A) issuing a scrub write command to a cacheline that includes a specified address;
- (B) waiting for any writes to the same cacheline that are in a write queue to execute;
- (C) loading the scrub write command into the write queue specifying a data dependency on a subsequent scrub read command;
- (D) issuing a scrub read command to read data from the address;
- (E) processing the data to correct all single-bit and single-symbol errors;
- (F) indicating that the data dependency in step (C) is satisfied;
- and
- (G) the scrub write command writing the processed data to the address in memory.
5 more elements
A memory controller comprising:
- a write queue for write operations to a memory coupled to the memory controller;
- a scrub controller that issues a scrub write command to a cacheline that includes a specified address;
- in response to the scrub write command issued by the scrub controller, the memory controller performing the steps of:
- (A) waiting for any writes to the same cacheline that are in the write queue to execute;
- (B) loading the scrub write command into the write queue specifying a data dependency on a subsequent scrub read command;
- the scrub controller issuing a scrub read command to read data from the address;
- in response to the scrub controller issuing the scrub read command, the memory controller performing the steps of:
- (C) processing the data to correct all single-bit and single-symbol errors;
- (D) indicating that the data dependency in step (B) is satisfied once the data is processed in step (C);
- and
- (E) processing the scrub write command in the write queue to write the processed data to the specified address in the memory.
8 more elements
Dependencies are inferred from the claim text.