Method of writing, erasing, and controlling memory for memory device
AssigneeFujitsu Limited
InventorsShinpei Komatsu, Yumi Ishii, Tomohiro Hayashi, Shogo Shibazaki, Hiroyuki Itoh, Masaru Takehara
Life of this patent
Estimating the term…
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AssigneeFujitsu Limited
InventorsShinpei Komatsu, Yumi Ishii, Tomohiro Hayashi, Shogo Shibazaki, Hiroyuki Itoh, Masaru Takehara
Estimating the term…
Data transferred from a host computer to a memory device is written into sectors whose addresses in a memory area are decoded by a decode table. Old data to be updated by the above data is erased or marked with erase flags. At a predetermined point of time, in order to create free areas, necessary data is evacuated to a primary memory media and unnecessary data indicated by erase flags is erased by a unit of predetermined memory size. Part of the memory media which has become defective is marked with a defect flag, and is replaced by an alternate area. In doing so, the decode table is rewritten to arrange the memory area.
A method of managing a memory device having a plurality of flash memory chips, each provided with a plurality of blocks, a free block of the blocks being used for writing new data, a block having old data replaced by the new data being erased by a unit of one block, the method comprising:
A method of managing a memory device comprising:
A memory device comprising:
Dependencies are inferred from the claim text.