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US 7,257,659 B2Granted
Method for signaling PCI/PCI-X standard hot-plug controller (SHPC) command status
AssigneeIntel Corporation
InventorsPeter N. Martin, Buck W. Gremel
Life of this patent
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Abstract
According to embodiments of the present invention, indicators on a PCI/PCI-X controlled by a Standard Hot-Plug Controller (SHPC) have non-fifty percent duty cycle blinking patterns that communicate to an operator a particular command being processed, whether the command was processed successfully, whether a “hard” or “soft” error occurred if the command was processed successfully, and whether power was applied to the slot if the command was not processed successfully.
Claims30
An apparatus, comprising:
- a standard hot-plug controller, the standard hot-plug controller having a blinking pattern controller to receive at least one command, the blinking pattern controller to:
- cause execution of a first blinking pattern on at least one indicator associated with at least one target peripheral component interconnect slot on a peripheral component interconnect bus, the first blinking pattern being unique to the command being processed, wherein a first unique blinking pattern is to indicate a first command to turn the indicator “on” solid;
- and
- cause execution of a second unique blinking pattern on the at least one indicator-associated with the at least one target peripheral component interconnect slot on the peripheral component interconnect bus, wherein the second unique blinking pattern is to indicate a second command different from the first command, wherein the first unique blinking pattern is different from the second unique blinking pattern.
1 more element
An apparatus, comprising:
- a standard hot-plug controller, the standard hot-plug controller having a blinking pattern controller to receive at least one command, the blinking pattern controller to:
- cause execution of a first unique blinking pattern and a second unique blinking pattern on at least one indicator associated with at least one target peripheral component interconnect slot on a peripheral component interconnect bus, and
- the first unique blinking pattern to indicate a hard error occurring during processing of the command and the second unique blinking pattern to indicate a soft error occurring during processing of the command.
A method, comprising:
- receiving a command at a standard hot-plug controller from a microprocessor;
- and
- causing execution of a blinking pattern on at least one indicator associated with at least one target peripheral component interconnect slot on a peripheral component interconnect bus,
- the blinking pattern indicating the command being processed,
- the blinking pattern having a duty cycle that is not fifty percent ±5%.
2 more elements
A method, comprising:
- causing execution of a first unique blinking pattern and a second unique blinking pattern on at least one indicator associated with at least one target peripheral component interconnect slot on a peripheral component interconnect bus,
- the first unique blinking pattern indicating a hard error occurring during processing of the command and the second unique blinking pattern to indicate a soft error occurring during processing of the command.
An article of manufacture including a machine-accessible tangible storage medium having data that, when accessed by a machine, cause the machine to perform the operations comprising:
- receiving a command at a standard hot-plug controller from a microprocessor;
- and
- causing execution of a blinking pattern on at least one indicator associated with at least one target peripheral component interconnect slot on a peripheral component interconnect bus,
- the blinking pattern indicating the command being processed,
- the blinking pattern having a duty cycle that is not fifty percent ±5%.
2 more elements
An article of manufacture including a machine-accessible tangible storage medium having data that, when accessed by a machine, cause the machine to perform the operations comprising:
- receiving at least one command at a standard hot-plug controller from a microprocessor;
- and
- causing execution of unique blinking patterns on at least one indicator associated with at least one target peripheral component interconnect slot on a peripheral component interconnect bus, and
- the unique blinking patterns indicating unique errors occurring during processing of the command, wherein the unique blinking patterns are to indicate a hard error and/or a soft error occurring during processing of the command.
1 more element
A system, comprising:
- a peripheral component interconnect bus having at least one peripheral component interconnect slot thereon, the peripheral component interconnect slot having at least one indicator associated therewith,
- a bridge coupled to the peripheral component interconnect bus, the bridge having a standard hot-plug controller coupled to the peripheral component interconnect bus, the standard hot-plug controller to receive a command, and cause execution of a blinking pattern on at least one indicator, the blinking pattern to indicate the command being processed, the blinking pattern having a duty cycle that is not fifty percent ±5%.
A system, comprising:
- a peripheral component interconnect bus having at least one peripheral component interconnect slot thereon, the peripheral component interconnect slot having at least one indicator associated therewith,
- a bridge coupled to the peripheral component interconnect bus, the bridge having a standard hot-plug controller coupled to the peripheral component interconnect bus, the standard hot-plug controller to receive a command, and cause execution of a blinking pattern on at least one indicator, the blinking pattern to indicate an error occurring during processing of the command, the of blinking pattern having a duty cycle that is not fifty percent ±5%.
A system, comprising:
- a chipset including:
- a standard hot-plug controller having a blinking pattern controller to receive at least one command, the blinking pattern controller to cause execution of a blinking pattern on at least one indicator associated with at least one target peripheral component interconnect slot on a peripheral component interconnect bus, the blinking pattern being unique to the command being processed, wherein a first unique blinking pattern is to indicate a first command to turn the indicator “on” solid, wherein a second unique blinking pattern is to indicate a second command different from the first command, wherein the first unique blinking pattern is different from the second unique blinking pattern;
- and
- static random access memory (SRAM) coupled to the standard hot-plug controller.
1 more element
Dependencies are inferred from the claim text.