Embedded PCI-Express implementation
AssigneeAltera Corporation
InventorsAli H. Burney, Sanjay Charagulla, Daniel Mansur
Life of this patent
Estimating the term…
Abstract
Methods and apparatus provide PCI Express support on a programmable device. A device includes a hard-coded transceiver that supports functionality associated with the PCI Express physical layer and link layer. The hard-coded transceiver can also support part of the PCI Express transaction layer. Soft-coded logic is used to support higher layer functionality including a portion of the transaction layer to allow custom configuration of PCI Express features such as virtual channels, buffers, prioritization, and quality of service characteristics. The hybrid solution reduces logic resource cost and provides an effective custom configurable solution.
Claims27
A programmable chip, comprising:
- hard-coded PCI Express physical layer circuitry, the hard-coded PCI Express physical layer circuitry configured to perform physical packet processing;
- hard-coded PCI Express link layer circuitry coupled to the hard-coded PCI Express physical layer circuitry, the hard-coded PCI link layer circuitry operable to perform link packet processing;
- soft-coded PCI Express transaction layer circuitry, the soft-coded PCI Express transaction layer circuitry customizable to provide support for a plurality of virtual channels;
- and
- hard-coded PCI Express transaction layer circuitry, the hard-coded PCI Express transaction layer circuitry operable to perform transaction layer packet processing.
A method for implementing a device supporting PCI Express, the method comprising:
- providing hard-coded PCI Express physical layer circuitry, the hard-coded PCI Express physical layer circuitry configured to perform physical packet processing;
- providing hard-coded PCI Express link layer circuitry coupled to the hard-coded PCI Express physical layer circuitry, the hard-coded PCI link layer circuitry operable to perform link packet processing;
- implementing soft-coded PCI Express transaction layer circuitry, the soft-coded PCI Express transaction layer circuitry customizable to provide support for a plurality of virtual channels;
- and
- providing hard-coded PCI Express transaction layer circuitry, the hard-coded PCI Express transaction layer circuitry operable to perform transaction layer packet processing.
A system for implementing a device supporting PCI Express, the system comprising:
- means for providing hard-coded PCI Express physical layer circuitry, the hard-coded PCI Express physical layer circuitry configured to perform physical packet processing;
- means for providing hard-coded PCI Express link layer circuitry coupled to the hard-coded PCI Express physical layer circuitry, the hard-coded PCI link layer circuitry operable to perform link packet processing;
- means for implementing soft-coded PCI Express transaction layer circuitry, the soft-coded PCI Express transaction layer circuitry customizable to provide support for a plurality of virtual channels;
- and
- means for providing hard-coded PCI Express transaction layer circuitry, the hard-coded PCI Express transaction layer circuitry operable to perform transaction layer packet processing.
Dependencies are inferred from the claim text.