PCI bridge device configured for using JTAG scan for writing internal control registers and outputting debug state
AssigneeAdvanced Micro Devices, Inc.
InventorsRichard W. Reeves, Austen John Hypher
Life of this patent
Estimating the term…
Loading patent…
AssigneeAdvanced Micro Devices, Inc.
InventorsRichard W. Reeves, Austen John Hypher
Estimating the term…
An integrated device (e.g., an integrated PCI bridge device), having configuration registers for storing configuration values, device logic for generating internal state values based on the configuration values, and a JTAG interface configured for receiving a serial input stream and outputting a serial output stream, further includes write logic and debug read logic. The write logic is configured for writing selected portions of the serial input stream into respective selected ones of the configuration registers, based on a detected input indicating a JTAG-based override. The debug read logic is configured, in response to a detected debug mode, for outputting selected internal state values for the serial output stream, based on selection values from the serial input stream and having been stored in a prescribed at least one of the selected configuration registers.
A method in an integrated device having a JTAG interface, the method comprising:
An integrated device comprising:
Dependencies are inferred from the claim text.