Temperature compensated bit-line precharge
AssigneeSamsung Electronics Co., Ltd.
InventorsKyeong-Han Lee, Sung-Soo Lee
Life of this patent
Estimating the term…
Abstract
A nonvolatile semiconductor memory device compensates for temperature changes by holding constant a bit line precharge level. A memory device according to the present invention may include an electrically programmable memory cell array connected to a plurality of word lines and a plurality of bit lines, a bit line voltage supplying circuit for supplying a bit line voltage to the bit lines, a shut-off circuit connecting the memory cell array and the bit line voltage supplying circuit, and a shut-off controlling circuit for controlling the shut off circuit. The shut-off controlling circuit may be constructed to compensate for temperature changes in order to hold the bit-line precharge level constant.
Claims19
A nonvolatile semiconductor memory device, comprising:
- an electrically programmable memory cell array connected to a plurality of word lines and a plurality of bit lines;
- a bit line voltage supplying circuit to supply a bit line voltage to the bit lines;
- a shut-off circuit connected between the memory cell array and the bit line voltage supplying circuit, to electrically disconnect or connect the bit lines and the bit line voltage supplying circuit during a precharge operation;
- and
- a shut-off controlling circuit to control the shut off circuit, wherein the shut-off controlling circuit is constructed to compensate a bit-line precharge level for a reading operation depending on temperature.
A nonvolatile semiconductor memory device, comprising:
- an electrically programmable memory cell array connected to a plurality of word lines and a plurality of bit lines;
- means for supplying a bit line voltage to the bit lines;
- means for electrically disconnecting or connecting the bit lines and a bit line voltage supplying circuit during a precharge operation;
- and
- means for controlling the means for electrically disconnecting or connecting, wherein the means for controlling is constructed to compensate a bit-line precharge level for a reading operation depending on temperature.
A method of operating a nonvolatile semiconductor memory device comprising:
- coupling a bit line to a sense node responsive to a gate voltage;
- and
- temperature compensating the gate voltage during a bit-line precharge prior to a bit-line sense operation.
Dependencies are inferred from the claim text.