Nonvolatile semiconductor memory device using irreversible storage elements

A nonvolatile semiconductor memory device comprising:

• a cell array including a plurality of storage cells arranged in matrix, each of the storage cells having a storage element which is programmed with information by varying electrical properties irreversibly, a selection switch connected in series to the storage element, and a protection element connected in parallel to the storage element to protect the storage element from irreversible variations of electrical properties when the storage element is programmed;
• a row selection control circuit which activates row selection lines to each of which a given number of storage cells are connected;
• a first activation circuit which activates the selection switch of the given number of storage cells connected to each of the row selection lines activated by the row selection control circuit;
• a second activation circuit which activates the protection elements in complement with the first activation circuit in normal mode;
• and
• a test circuit which conducts a test on the storage element of each of the given number of storage cells connected to each of the row selection lines while the second activation circuit is activating the protection elements together with the first activation circuit in test mode.