Selector circuit and semiconductor device
AssigneeFujitsu Limited
InventorMasaki Komaki
Life of this patent
Estimating the term…
Abstract
A selector circuit precisely outputs a signal selected from a plurality of signals. A latch circuit unit generates an internal selection control signal for controlling a selection operation of a selector circuit unit. When the levels of first and second data input signals do not match each other, the selector circuit unit maintains its selected state and does not perform a selecting operation based on the selection signal until the levels of the signals match each other in accordance with the internal selection control signal.
Claims16
A selector circuit comprising:
- a selector circuit unit for selecting one of a plurality of signals in accordance with a selection signal;
- and
- a selection control circuit, connected to the selector circuit unit, for generating, when levels of the plurality of signals do not match one another, an internal selection control signal for controlling a selection operation of the selector circuit unit to maintain a state that is being selected in the selector circuit unit and not to perform a switching operation based on the selection signal until the levels of the plurality of signals match one another,
- wherein the selection control circuit propagates the selection signal and generates an internal selection control signal having a level corresponding to the selection signal when the levels of the plurality of signals match one another, and interrupts propagation of the selection signal and maintains the level of the internal selection control signal to be provided to the selector circuit unit until the levels of the plurality of signals match one another when the levels of the plurality of signals do not match one another.
A selector circuit comprising:
- a selector circuit unit for selecting one of a plurality of signals in accordance with a selection signal;
- and
- a selection control circuit, connected to the selector circuit unit, for generating, when levels of the plurality of signals do not match one another, an internal selection control signal for controlling a selection operation of the selector circuit unit to maintain a state that is being selected in the selector circuit unit and not to perform a switching operation based on the selection signal until the levels of the plurality of signals match one another,
- wherein the selector circuit unit receives a first input signal and a second input signal, and selects one of the first and second input signals, and wherein the selection control circuit includes:
- a first signal propagation circuit including a first switching circuit that is brought into conduction when levels of the first and second input signals match each other, and a first inverter circuit unit that is driven by the first switching circuit, wherein first inverter circuit unit inverts the selection signal to generate a first internal selection control signal;
- an inverter circuit, connected to the first signal propagation circuit, for inverting the first internal selection control signal to generate a second internal selection control signal;
- and
- a second signal propagation circuit, connected to the first signal propagation circuit and the inverter circuit, including a second switching circuit that is brought into conduction when the levels of the first and second input signal do not match each other, and a second inverter circuit unit that is driven by the second switching circuit, wherein the second inverter circuit unit inverts the second internal selection control signal to generate the first internal selection control signal.
A semiconductor device comprising:
- a selector circuit including:
- a selector circuit unit for selecting one of a plurality of signals in accordance with a selection signal;
- and
- a selection control circuit, connected to the selector circuit unit, for generating, when levels of the plurality of signals do not match one another, an internal selection control signal for controlling a selection operation of the selector circuit unit to maintain a state that is being selected in the selector circuit unit and not to perform a switching operation based on the selection signal until the levels of the plurality of signals match one another,
- wherein the selection control circuit propagates the selection signal and generates an internal selection control signal having a level corresponding to the selection signal when the levels of the plurality of signals match one another, and interrupts propagation of the selection signal and maintains the level of the internal selection control signal to be provided to the selector circuit unit until the levels of the plurality of signals match one another when the levels of the plurality of signals do not match one another.
A semiconductor device comprising:
- a selector circuit including:
- a selector circuit unit for selecting one of a plurality of signals in accordance with a selection signal;
- and
- a selection control circuit, connected to the selector circuit unit, for generating, when levels of the plurality of signals do not match one another, an internal selection control signal for controlling a selection operation of the selector circuit unit to maintain a state that is being selected in the selector circuit unit and not to perform a switching operation based on the selection signal until the levels of the plurality of signals match one another,
- wherein the selector circuit unit receives a first input signal and a second input signal, and selects one of the first and second input signals, and wherein the selection control circuit includes:
- a first signal propagation circuit including a first switching circuit that is brought into conduction when levels of the first and second input signals match each other, and a first inverter circuit unit that is driven by the first switching circuit, wherein first inverter circuit unit inverts the selection signal to generate a first internal selection control signal;
- an inverter circuit, connected to the first signal propagation circuit, for inverting the first internal selection control signal to generate a second internal selection control signal;
- and
- a second signal propagation circuit, connected to the first signal propagation circuit and the inverter circuit, including a second switching circuit that is brought into conduction when the levels of the first and second input signal do not match each other, and a second inverter circuit unit that is driven by the second switching circuit, wherein the second inverter circuit unit inverts the second internal selection control signal to generate the first internal selection control signal.
Dependencies are inferred from the claim text.