Semiconductor integrated circuit device
AssigneeRohm Co., Ltd.
InventorHidetoshi Nishikawa
Life of this patent
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Abstract
A semiconductor integrated circuit device (1) includes: a transistor switch (SWA) for electrically connecting and disconnecting output of a flip-flop (FF64) of a shift register (SR1) and input of a flip-flop (FF65) of a shift register (SR2); and a transistor switch (SWB) for electrically connecting and disconnecting an input driver (Din2) and input of the flip-flop (FF65). Here, when the shift registers (SR1 and SR2) are connected, the transistor switch (SWA) is turned ON and the transistor switch (SWB) is turned OFF by a selection signal.
Claims9
A semiconductor integrated circuit device, comprising:
- first to n-th shift registers;
- first to n-th input terminals that receive data fed to the first to n-th shift registers;
- a first switch that electrically connects and disconnects an output of a k-th shift register (where k is an integer such that 1≦k≦n−1) and an input of a k+1-th shift register;
- a second switch that electrically connects and disconnects an input of the k+1-th shift register and a k+1-th input terminal that receives data to the k+1-th shift register;
- and
- a selection signal input terminal that receives a selection signal for switching ON/OFF of the first switch and the second switch,
- wherein, when the k-th shift register and the k+1-th shift register are used in a combined manner, the first switch is turned ON and the second switch is turned OFF by the selection signal, and
- wherein, when the k-th shift register and the k+1-th shift register are used separately, the first switch is turned OFF and the second switch is turned ON by the selection signal.
A semiconductor integrated circuit device, comprising:
- first to n-th shift registers;
- first to n-th input terminals that receive data fed to the first to n-th shift registers;
- and
- a switching control portion that performs, according to whether or not a k+1-th input terminal that receives data to a k+1-th shift register (where k is 1≦k≦n−1) is connected to an outside, switching control of whether an output of the k-th shift register and an input of the k+1-th shift register are connected together, or the k+1-th input terminal and an input of the k+1-th shift register are connected together,
- wherein, when the switching control portion recognizes that the k+1-th input terminal is in an open state in which the k-th input terminal is not connected to the outside, an output of the k-th shift register and an input of the k+1-th shift register are connected together, and the k+1-th input terminal and an input of the k+1-th shift register are disconnected from one another, and
- wherein, when the switching control portion recognizes that the k+1-th input terminal is connected to the outside and data is inputted thereto, an output of the k-th shift register and an input of the k+1-th shift register are disconnected from one another, and the k+1-th input terminal and an input of the k+1-th shift register are connected together.
Dependencies are inferred from the claim text.