US 7,256,464 B2Granted

Metal oxide semiconductor transistor and fabrication method thereof

AssigneeUnited Microelectronics Corp.

InventorsWen-Shiang Liao, Wei-Tsun Shiau

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Abstract

A metal oxide semiconductor transistor comprising a first doping type substrate, an isolation layer, a plurality of gates, a masking layer, a gate oxide layer, a plurality of second doping type source/drain regions and spacers. The first doping type substrate has a plurality of trenches patterning out a plurality of first doping type strips. The isolation layer is disposed within the trenches. The gates is disposed over the first doping type strips and oriented in a direction perpendicular to the first doping type strips. The masking layer is disposed over the first doping type substrate. The gate oxide layer is disposed between the sidewall of the first doping type strips and the gate. The second doping type source/drain regions are disposed in the first doping type strip on each side of the gate. The spacers are disposed on the sidewalls of the gates and the first doping type strips.

Claims8

Dependent claims

A metal oxide semiconductor (MOS) transistor structure, comprising:

a first doping type semiconductor substrate having a plurality of trenches that partition the first doping type semiconductor substrate into a plurality of first doping type semiconductor strips;
a masking layer disposed on the first doping type semiconductor substrate;
an isolation layer disposed in the trenches, wherein the surface of the isolation layer is below the upper surface of the first doping type semiconductor strips;
a plurality of gates disposed over the first doping type semiconductor strips and set in a direction perpendicular to the first doping type semiconductor strips;
a gate oxide layer disposed between the sidewalls of the first doping type semiconductor strips and the gates;
a plurality of spacers disposed on the sidewalls of the gates and the first doping type semiconductor strips;
and
a plurality of second doping type source/drain regions disposed in the first doping type semiconductor strips on each side of the gates.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 11/162,080Filed 29 Aug 2005
Published: US 2007/0045750 A11 Mar 2007
Granted: 14 Aug 2007
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

H10D 84/013
The components including insulated gates, e.g. IGFETs: manufacturing their source or drain regions, e.g. silicided source or drain regions
H10D 30/608
Having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs: having non-planar bodies, e.g. having recessed gate electrodes
H10D 62/021
Manufacture or treatment: forming source or drain recesses by etching e.g. recessing by etching and then refilling
H10D 84/017
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their source or drain regions, e.g. silicided source or drain regions