One time programmable memory cell
AssigneeAlpha and Omega Semiconductor Incorporated
InventorsYongzhong Hu, Sung-Shan Tai
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Abstract
This invention discloses a one-time programmable (OTP) memory cell. The OTP memory cell includes a dielectric layer disposed between two conductive polysilicon segments wherein the dielectric layer is ready to change from a non-conductive state to a conductive state through an induced voltage breakdown. In a preferred embodiment, one of the conductive polysilicon segments further includes an etch undercut configuration for conveniently inducing the voltage breakdown in the dielectric layer. In a preferred embodiment, the dielectric layer is further formed as sidewalls covering the edges and corners of a first polysilicon segments to conveniently induce a voltage breakdown in the dielectric layer by the edge and corner electrical field effects.
Claims15
A one-time programmable (OTP) memory cell comprising:
- a dielectric layer disposed immediately between a first and a second conductive polysilicon segments functioning as a high voltage electrode and a low voltage electrode for applying a high and a low voltage thereon respectively wherein said dielectric layer wrapping around a bottom edge of said first conductive segment constituting a breakdown vulnerable layer immediately near said bottom edge and is ready to change from a non-conductive state to a conductive state through an induced voltage breakdown.
A method for manufacturing a one-time programmable (OTP) memory cell comprising:
- disposing a dielectric layer immediately between a first and a second conductive polysilicon segments with said dielectric layer wrapping around a bottom edge of said first conductive polysilicon segment for functioning as a breakdown vulnerable layer for readily inducing a voltage breakdown in said dielectric layer to change from a non-conductive state to a conductive state for carrying out a one-time program operation.
A method of manufacturing a one-time programmable (OTP) memory cell comprising:
- forming a first conductive polysilicon segment on to of an insulation layer supported on a semiconductor substrate and growing an oxide layer around said first conductive polysilicon segment followed by etching off said oxide layer from around said first conductive polysilicon layer with an etch undercut extending to a space underneath said first conductive polysilicon segment;
- and
- depositing a conformal dielectric layer around said first conductive polysilicon segment wrapping around a bottom edge of said first conductively polysilicon segment thus forming a breakdown vulnerable layer near said bottom edge for conveniently inducing a voltage breakdown in said dielectric layer.
Dependencies are inferred from the claim text.