Semiconductor device having a dual-damascene gate and manufacturing method thereof

Abstract

A method of manufacturing a semiconductor device having a dual-damascene gate including forming LDD regions by forming a gate oxide film on a semiconductor substrate, and by implanting lowly-concentrated impurities in the semiconductor substrate in accordance with a predetermined LDD pattern, and forming a nitride film on the gate oxide film, and forming a wide nitride film in accordance with the wide nitride pattern. The method also includes forming a narrow nitride film by a narrow etching process on the wide nitride film in accordance with a predetermined narrow nitride film pattern, forming a dual-damascene gate by depositing a polysilicon layer on an exposed entire surface and smoothing the deposited polysilicon layer to a top surface of the nitride film, and forming a gate electrode by removing a predetermined region of the polysilicon layer. The method further includes forming a sidewall nitride film on the gate electrode by etching the exposed nitride film in accordance with a nitride film pattern, and forming source/drain regions by performing an ion implantation process on the source/drain regions.

Dependencies are inferred from the claim text.