Trench lateral power MOSFET and a method of manufacturing the same

A method of manufacturing a semiconductor device having a trench MOSFET and a planar MOSFET integrated on a semiconductor substrate of a first conductivity type, the trench MOSFET comprising a trench provided in the semiconductor substrate;

• a source region of a second conductivity type formed in the substrate surface region, outside said trench;
• a base region of the first conductivity type formed below said source region, outside said trench;
• a drift region of the second conductivity type formed below said base region along the side portions of said trench, outside said trench;
• a drain region of the second conductivity type formed in the bottom portion of said trench;
• a gate insulating film formed inside said trench along the side portions and bottom portion of said trench;
• a first conductor formed on the inside of said gate insulating film;
• and a second conductor formed on the inside of said first conductor via an interlayer insulating film, and electrically connected to said drain region, wherein, in an active region of said device, the gate insulating film on the bottom surface of said trench extends from the side wall of said trench to said second conductor and contacts said second conductor, and wherein the gate insulating on the bottom surface of said trench becomes thicker, as measured in the direction of the depth of the trench from the side wall of said trench or said first conductor toward said second conductor, the method comprising the steps of:
• forming a well region of the second conductivity type in one part of the surface region of the semiconductor substrate;
• forming the trench inside a trench MOSFET formation region, which is outside said well region;
• forming the drift region around the periphery of said trench;
• forming a nitride film on the substrate surface and inside said trench;
• removing, in at least a region corresponding to an active region, part of said nitride film covering the bottom portion of the trench and the boundary part of said nitride film between each trench MOSFET and planar MOSFET on the substrate surface;
• forming a selectively oxidized film with said nitride film serving as a mask;
• forming the gate insulating film on the substrate surface and on the bottom and inner sides of said trench;
• forming the first conductor along the surface of said gate insulating film on the substrate surface and on the inner side of said trench;
• etching back said first conductor in the region corresponding to the active region such that on the substrate surface said first conductor remains in one part of the region in which said selectively oxidized film is not formed, and such that in the region where said trench is formed said first conductor remains only on the lateral surfaces of said trench;
• forming the base region and the source region in the trench MOSFET formation region and the substrate surface region, outside said trench;
• forming one of source and drain regions of the first conductivity type, inside said well region within the planar MOSFET formation region;
• forming the other of source and drain regions of the second conductivity type, outside said well region within the planar MOSFET formation region;
• forming the interlayer insulating film above said first conductor within the planar MOSFET formation region and on the inner side of said first conductor inside said trench;
• selectively removing, in the region corresponding to the active region, the bottom portion of said interlayer insulating film and said gate insulating film inside said trench;
• forming the drain region on the bottom portion of the trench;
• and
• providing the second conductor inside said trench, electrically connecting said second conductor to said drain region.