Semiconductor integrated circuit
AssigneeKabushiki Kaisha Toshiba
InventorsKenichi Anzou, Chikako Tokunaga
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit includes: a logic circuit to be tested; a memory connected the logic circuit to be tested; a BIST circuit for testing the memory; and a bypass circuit connected between the memory and the logic circuit and between the memory and the BIST circuit, the bypass circuit has a parallel test path for testing the logic circuit and the memory in parallel, and a signal line test path for testing non-tested signal lines in the parallel test path, and the bypass circuit selectively switches the parallel test path and the signal line test path.
Claims20
A semiconductor integrated circuit comprising:
- a logic circuit to be tested;
- a memory connected to the logic circuit to be tested;
- a built-in self test circuit for testing the memory;
- and
- a bypass circuit connected between the memory and the logic circuit and between the memory and the built-in self test circuit, the bypass circuit has a parallel test path for testing the logic circuit and the memory in parallel so as to separate the memory from the test path for testing the logic circuit, and a signal line test path for testing non-tested signal lines in the parallel test path, and the bypass circuit selectively switches the parallel test path and the signal line test path.
Dependencies are inferred from the claim text.