On-chip receiver sensitivity test mechanism
AssigneeTexas Instruments Incorporated
InventorsElida Isabel de Obaldia, Dirk Leipold, Oren Eliezer, Ran Katz, Bogdan Staszewski
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AssigneeTexas Instruments Incorporated
InventorsElida Isabel de Obaldia, Dirk Leipold, Oren Eliezer, Ran Katz, Bogdan Staszewski
Estimating the term…
An on-chip receiver sensitivity test mechanism for use in an integrated RF transmitter wherein the transmitter and the receiver share the same oscillator. The mechanism obviates the need to use expensive RF signal generator test equipment with built-in modulation capability and instead permits the use of very low cost external RF test equipment. The invention utilizes circuitry already existing in the transceiver, namely the modulation circuitry and local oscillator, to perform sensitivity testing. The on-chip LO is used to generate the modulated test signal that otherwise would need to be provided by expensive external RF test equipment with modulation capability. The modulated LO signal is mixed with an externally generated unmodulated CW RF signal to generate a modulated signal at IF which is subsequently processed by the remainder of the receiver chain. The recovered data bits are compared using an on-chip BER meter or counter and a BER reading is generated. The BER reading is used either externally or by an on-chip processor or controller to establish a pass/fail indication for the chip.
A method of testing receiver sensitivity, dynamic range and other BER performance related measures in a frequency modulated transceiver incorporating a local oscillator shared between a transmitter and a receiver, said method comprising the steps of:
An apparatus for testing receiver sensitivity in a frequency modulated transceiver incorporating a local oscillator shared between a transmitter and a receiver, comprising:
An apparatus for testing receiver sensitivity in a frequency modulated transceiver incorporating a local oscillator shared between a transmitter and a receiver, comprising:
A method of testing receiver sensitivity in a transceiver chip incorporating a local oscillator (LO) shared between a transmitter and a receiver, test sequence generator and bit error rate (BER) meter, said method comprising the steps of:
A method of testing and characterizing receiver sensitivity in a transceiver chip incorporating a local oscillator (LO) shared between a transmitter and a receiver, test sequence generator and bit error rate (BER) meter, said method comprising the steps of:
A method of testing the highest possible RF input level of a receiver in a transceiver chip incorporating a local oscillator (LO) shared between a transmitter and a receiver, test sequence generator and bit error rate (BER) meter, said method comprising the steps of:
A method of testing the tolerance of a receiver to input frequency errors in a transceiver chip incorporating a local oscillator (LO) shared between a transmitter and a receiver, test sequence generator and bit error rate (BER) meter, said method comprising the steps of:
Dependencies are inferred from the claim text.