Encryption/decryption instruction set enhancement

A process for performing encryption or decryption under a Data Encryption Standard (DES) algorithm, comprising:

• executing a DES instruction on a general purpose microprocessor;
• providing a logic circuit in an arithmetic logic unit;
• performing expansion permutation, S-box substitution P-box permutation and associated XOR operations in said logic circuit based on the DES instruction;
• storing operands in a register file;
• providing said operands to said logic circuit;
• and
• wherein said register file includes general purpose registers that store states of the DES algorithm.

A computer system capable of performing encryption or decryption under a Data Encryption Standard (DES) algorithm, comprising:

• a general purpose microprocessor that comprises an arithmetic logic unit having a logic circuit for performing expansion permutation, S-box substitution, P-box permutation and associated XOR operations;
• wherein said computer system further comprises a register file providing operands to said arithmetic logic unit;
• and
• wherein said register file includes general purpose registers to store at least two of attributes, parameters, datapath, control, Li's, Ri's, and subkeys Ki's.