Device and method for comma detection and word alignment in serial transmission
AssigneeVIA Technologies, Inc.
InventorChin-Yi Chiang
Life of this patent
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Abstract
The invention is applied in a gigabit network environment. During the process of converting serial data into parallel data, a method is proposed to use the comma pattern in a data pipeline architecture to select word boundaries of a correct data frame from a serial bit stream. This method is further implemented in a bit receiver with a two-stage pipeline architecture to achieve the object of increasing data transmission bandwidth and efficiency.
Claims17
A device for comma detection and word alignment for n-to-m bit conversion serial transmission, the device comprising:
- a two-stage pipeline architecture composed of a plurality of register sets with h-bit data width, which receives a serial data stream;
- a comma detection logical circuit, which detects the distribution of a k-bit comma pattern in the register sets of a first-stage pipeline;
- and
- a word alignment logical circuit, which extracts an n-bit word data in the register sets of a second-stage pipeline, and the output data go through an n-to-m bit conversion to obtain an m-bit data,
- wherein when the serial data streams enter the first stage pipeline, said comma detection logical circuit detects the location of a k-bit comma pattern and then a comma detection indication signal is transmitted to said word alignment logical circuit, the locations of the n-bit word data in a second-stage pipeline are selected and extracted according to the locations of the k-bit comma pattern in said first-stage pipeline.
A bit receiver for n-to-m bit reception and conversion in serial transmission, the bit receiver comprising:
- a pipeline architecture composed of a plurality of register sets with h-bit data width, which receives a serial data stream and has a first-stage pipeline and a second stage pipeline;
- a comma detection logical circuit, which detects the distribution of a k-bit comma pattern in the register sets of the first-stage pipeline when the serial data stream enters the first-stage pipeline;
- and
- a word alignment logical circuit, which extracts an n-bit word data in the register sets of the second-stage pipeline when the serial data streams enter the second-stage pipeline,
- wherein the locations of the n-bit word data are selected according to the location of the k-bit comma pattern in the second-stage pipeline, and the output data go through an n-to-m bit conversion to obtain an m-bit data.
A device for a pipeline architecture with a first-stage pipeline and a second-stage pipeline for n-to-m bit receiving and conversion of a serial data stream, the pipeline architecture composed of a plurality of register sets with h-bit data width, said device comprising:
- a comma detection logical circuit, which detects the distribution of a k-bit comma pattern in the register sets of the first-stage pipeline when the serial data stream enters the first-stage pipeline;
- and
- a word alignment logical circuit, which extracts an n-bit word datum in the register sets of the second-stage pipeline when the serial data stream enters the second-stage pipeline,
- wherein the locations of the n-bit word data are selected according to the location of the k-bit comma pattern in the second-stage pipeline, and the output data go through an n-to-m bit conversion to obtain a m-bit data.
A method of comma detection and word alignment for n-to-m bit conversion in serial transmissions, the method comprising:
- detecting the distribution of a k-bit comma pattern when the serial data stream enters a first-stage pipeline in a two-stage pipeline architecture composed of a plurality of register sets with h-bit data width;
- and
- extracting an n-bit word data when the serial data stream enters a second-stage pipeline in the two-stage pipeline architecture;
- wherein the locations of the n-bit word data are selected according to the locations of the k-bit comma pattern in the second-stage pipeline, and the output data go through an n-to-m bit conversion to obtain an m-bit data,
- wherein k<n and said location of the k-bit comma pattern in the first-stage pipeline is used to define the boundaries of a corresponding n-bit data frame in the second-stage pipeline.
Dependencies are inferred from the claim text.