Method for decomposing timing jitter on arbitrary serial data sequences
AssigneeTektronix, Inc.
InventorMark L. Guenther
Life of this patent
Estimating the term…
Abstract
A method and apparatus for decomposing timing jitter on arbitrary serial data sequences. Specifically, in one embodiment according to the present invention, a method is provided of decomposing timing jitter on a signal under test (SUT) comprising an arbitrary serial data stream. The method comprises performing a statistical analysis on a group of measurements, where each measurement comprises a timing jitter value and an associated bit pattern representing the bits falling within an analysis window, said window being successively located at a plurality of positions within the data stream.
Claims20
A method of decomposing timing jitter on a signal under test (SUT) comprising an arbitrary serial data stream, said method comprising:
- forming a group of measurements, where each measurement includes a timing jitter value and an associated bit pattern representing bits falling within an analysis window of a chosen length, said analysis window being successively located at a plurality of positions within the SUT;
- and
- performing a statistical analysis on said group of measurements to calculate a mean value of inter-symbol interference (ISI) associated with each bit pattern.
A test and measurement device, comprising:
- an acquisition module, for acquiring signal under test SUT to produce a sample stream;
- a processing module, for
- forming a group of measurements, where each measurement includes a timing jitter value and an associated bit pattern representing bits falling within an analysis window of a chosen length, said analysis window being successively located at a plurality of positions within the sampl stream, and
- performing a statistical analysis on said group of measurements to calculate a mean value of inter-symbol interference (ISI) associated with each bit pattern;
- and
- a display module, for displaying results of said statistical analysis.
A computer-readable media for storing software instructions which when executed by a processor perform the steps of:
- decomposing timing jitter on a signal under test (SUT), the SUT being an arbitrary serial data stream, by
- forming a group of measurements, where each measurement includes a timing jitter value and an associated bit pattern representing bits falling within an analysis window of a chosen length, said analysis window being successively located at a plurality of positions within the arbitrary serial data stream;
- and
- performing a statistical analysis on said group of measurements to calculate the a mean value of inter-symbol interference (ISI) associated with each bit pattern.
Dependencies are inferred from the claim text.