OLED display and pixel structure thereof

A pixel structure of an active matrix organic light-emitting diode (OLED) display, comprising:

• a switching transistor having a gate terminal coupled to a scan signal and a drain terminal coupled to a data signal;
• a storage capacitor having two terminals coupled to a source terminal of the switching transistor and a reference node respectively, the reference node having a second voltage;
• a plurality of driving transistors connected in parallel, each having a gate terminal coupled to the source terminal of the switching transistor, a source terminal coupled to the reference node, and a drain terminal;
• and
• an OLED having a cathode coupled to the drain terminals of the driving transistor and an anode coupled to a first voltage exceeding the second voltage;
• wherein the driving transistors are amorphous silicon thin film transistors (a-Si TFT), wherein the relationship between an equivalent channel width/length (W/L) ratio R of the driving transistor and the number of driving transistors N is
• R
• ⁢
• >
• _
• ⁢
• 10
• N
• .

An active matrix organic light-emitting diode (OLED) display, comprising:

• a panel, comprising a plurality of pixels, each comprising a first transistor having a gate terminal coupled to a scan signal and a drain terminal coupled to a data signal;
• a storage capacitor having two terminals coupled to a source terminal of the first transistor and a reference node respectively, the reference node having a second voltage;
• a second transistor having a gate terminal coupled to the source terminal of the first transistor and a source terminal coupled to the reference node;
• and an OLED having a cathode coupled to a drain terminal of the second transistor and an anode coupled to a first voltage exceeding the second voltage;
• wherein the second transistor is an amorphous silicon thin film transistor (a-Si TFT), and an equivalent channel width/length (W/L) ratio of the second transistor exceeds 10.

An active matrix organic light-emitting diode (OLED) display, comprising:

• a panel, comprising a plurality of pixels, each comprising a switching transistor having a gate terminal coupled to a scan signal and a drain terminal coupled to a data signal;
• a storage capacitor having two terminals coupled to a source terminal of the switching transistor and a reference node respectively, the reference node having a second voltage;
• a plurality of driving transistors connected in parallel, each having a gate terminal coupled to the source terminal of the switching transistor, a source terminal coupled to the reference node and a drain terminal;
• and an OLED having a cathode coupled to the drain terminals of the driving transistor and an anode coupled to a first voltage exceeding the second voltage;
• wherein the driving transistors are amorphous silicon thin film transistors (a-Si TFT), wherein the relationship between an equivalent channel width/length (W/L) ratio R of the driving transistor and the number of driving transistors N is
• R
• ⁢
• >
• _
• ⁢
• 10
• N
• .

A pixel structure of an active matrix organic light-emitting diode (OLED) display, comprising:

• a first transistor having a gate terminal coupled to a scan signal and a drain terminal coupled to a data signal;
• a storage capacitor having two terminals coupled to a source terminal of the first transistor and a reference node respectively, the reference node having a second voltage;
• a second transistor having a gate terminal coupled to the source terminal of the first transistor and a drain terminal coupled to the reference node;
• and
• an OLED having an anode coupled to a source terminal of the second transistor and a cathode coupled to a first voltage less than the second voltage;
• wherein the second transistor is an amorphous silicon thin film transistor (a-Si TFT), and an equivalent channel width/length (W/L) ratio of the second transistor exceeds 10.

A pixel structure of an active matrix organic light-emitting diode (OLED) display, comprising:

• a switching transistor having a gate terminal coupled to a scan signal and a drain terminal coupled to a data signal;
• a storage capacitor having two terminals coupled to a source terminal of the switching transistor and a reference node respectively, the reference node having a second voltage;
• a plurality of driving transistors connected in parallel, each having a gate terminal coupled to the source terminal of the switching transistor, a drain terminal coupled to the reference node, and a source terminal;
• and
• an OLED having an anode coupled to the source terminals of the driving transistor and a cathode coupled to a first voltage less than the second voltage;
• wherein the driving transistors are amorphous silicon thin film transistors (a-Si TFT), and the relationship between an equivalent channel width/length (W/L) ratio R of the driving transistor and the number of driving transistors N is
• R
• ⁢
• >
• _
• ⁢
• 10
• N
• .

An active matrix organic light-emitting diode (OLED) display, comprising:

• a panel, comprising a plurality of pixels, each comprising a first transistor having a gate terminal coupled to a scan signal and a drain terminal coupled to a data signal;
• a storage capacitor having two terminals coupled to a source terminal of the first transistor and a reference node respectively, the reference node having a second voltage;
• a second transistor having a gate terminal coupled to the source terminal of the first transistor and a drain terminal coupled to the reference node;
• and an OLED having an anode coupled to a source terminal of the second transistor and a cathode coupled to a first voltage less than the second voltage;
• wherein the second transistor is an amorphous silicon thin film transistor (a-Si TFT), and an equivalent channel width/length (W/L) ratio of the second transistor exceeds 10.

An active matrix organic light-emitting diode (OLED) display, comprising:

• a panel, comprising a plurality of pixels, each comprising a switching transistor having a gate terminal coupled to a scan signal and a drain terminal coupled to a data signal;
• a storage capacitor having two terminals coupled to a source terminal of the switching transistor and a reference node respectively, the reference node having a second voltage;
• a plurality of driving transistors connected in parallel, each having a gate terminal coupled to the source terminal of the switching transistor, a drain terminal coupled to the reference node, and a source terminal;
• and an OLED having an anode coupled to the source terminals of the driving transistor and a cathode coupled to a first voltage less than the second voltage;
• wherein the driving transistors are amorphous silicon thin film transistors (a-Si TFT), and the relationship between an equivalent channel width/length (W/L) ratio R of the driving transistor and the number of driving transistors N is
• R
• ⁢
• >
• _
• ⁢
• 10
• N
• .