Reference voltage generating circuit

A sigma-delta analog-to-digital converter (ADC) comprising:

• a reference voltage generating circuit, for generating a reference voltage according to a predetermined voltage, the reference voltage generating circuit comprising:
• a first capacitor;
• a second capacitor;
• a reference voltage sampling capacitor;
• a first switch, for alternatively coupling the second capacitor to the predetermined voltage, wherein the first switch couples the second capacitor to the predetermined voltage in a first stage such that the second capacitor samples the predetermined voltage;
• a second switch, for alternatively coupling the second capacitor to the first capacitor, wherein the second switch couples the second capacitor to the first capacitor in the second stage such that the second capacitor redistributes charges with the first capacitor in order to generate the reference voltage;
• and
• a third switch, for alternatively coupling the first capacitor to the reference voltage sampling capacitor, wherein the third switch couples the first capacitor to the reference voltage sampling capacitor in the first stage such that the reference voltage sampling capacitor redistributes charges with the first capacitor to generate the reference voltage;
• and
• a sigma delta modulator, for receiving the reference voltage from the reference voltage sampling capacitor in the first stage and receiving an analog signal in the second stage in order to generate a corresponding digital signal according to the analog signal and the reference voltage.

A sigma delta digital-to-analog converter (DAC) comprising:

• a reference voltage generating circuit, for receiving a predetermined voltage and filtering the predetermined voltage to generate a reference voltage, the reference voltage generating circuit comprising:
• a first capacitor;
• a second capacitor;
• a reference voltage sampling capacitor;
• a first switch, for alternatively coupling the second capacitor to the predetermined voltage, wherein the first switch couples the second capacitor to the predetermined voltage in a first stage such that the second capacitor samples the predetermined voltage and breaks the electrical connection between the second capacitor and the predetermined voltage in a second stage;
• a second switch, for alternatively coupling the second capacitor to the first capacitor, wherein the second switch couples the second capacitor to the first capacitor in the second stage such that the second capacitor redistributes charges with the first capacitor in order to generate the reference voltage and breaks the electrical connection between the first capacitor and the second capacitor in the first stage;
• and
• a third switch, for alternatively coupling the first capacitor to the reference voltage sampling capacitor, wherein the third switch couples the first capacitor to the reference voltage sampling capacitor in the first stage such that the reference voltage sampling capacitor redistributes charges with the first capacitor to generate the reference voltage and breaks the electrical connection between the first capacitor and the reference voltage sampling capacitor in the second stage;
• and
• a sigma delta modulator, for receiving the reference voltage from the reference voltage sampling capacitor according to a digital signal in the first stage to generate an analog signal.

A reference voltage generating method for receiving a predetermined voltage and filtering the predetermined voltage to generate a reference voltage, the reference voltage generating method comprising:

• utilizing a first capacitor to sample the predetermined voltage in a first stage;
• coupling the first capacitor to a second capacitor in a second stage such that the first capacitor redistributes charges stored in the first capacitor with the second capacitor to generate the reference voltage;
• and
• coupling a reference voltage sampling capacitor to the second capacitor in the first stage to obtain the reference voltage from the second capacitor.