Clock adjusting method and electronic device with clock adjusting function
AssigneeSunplus Technology Co., Ltd.
InventorWen-Kuan Chen
Life of this patent
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Abstract
A method for adjusting a clock and an electronic device with clock adjusting function are provided. In the method of adjusting the clock, the electronics device is driven with a first clock when the electronic device is during the reset-inactive state. Then, the electronic device is driven with a second clock when the electronic device receives a reset signal. Wherein, the cycle of the second clock is larger than that of the first clock.
Claims13
A method of adjusting a clock, adapted for an electronic device the method of adjusting the clock comprising:
- receiving an input clock;
- generating a first clock and a second clock from the input clock;
- driving the electronic device with the first clock when the electronic device is in a reset-inactive state, and entering into a reset-preparing state after a reset signal is received by the electronic device during the reset-inactive state;
- synchronizing the reset signal as a system reset signal during the reset-preparing state according to the input clock, and entering into a reset state after the reset-preparing state is maintained for at least one cycle of the first clock;
- and
- driving the electronic device with the system reset signal and the second clock during the reset state, and returning to the reset-inactive state after at least one cycle of the second clock, wherein the cycle of the second clock is larger than the cycle of the first clock.
An electronic device with clock adjusting function, comprising:
- an operating unit, receiving a system reset signal and a system clack for operation;
- a clock switch, receiving a first clock and a second clock, wherein a cycle of the second clock is larger than a cycle of the first clock;
- a clock switch control state machine, controlling the clock switch to output the first clock as a system clock during a reset-inactive state;
- after a reset signal is received, the clock switch control state machine entering into a reset-preparing state;
- after the reset-preparing state is maintained for at least one cycle of the first clock, the clock switch control state machine entering into a reset state;
- while entering the reset state, the clock switch outputs the second clock as the system clock;
- and
- a synchronizer, receiving an input clock from outside and the reset signal from the clock switch control state machine;
- the reset signal being synchronized as the system reset signal according to the input clock;
- while the clock switch control state machine enters into the reset state, the system reset signal being outputted to the operating unit.
An electronic device with clock adjusting function, comprising:
- an operating unit, receiving a system reset signal and a system clock for operation;
- a clock shaper, receiving and shaping an input clock as a first clock or a second clock, wherein the first clock and the second clock serve as the system clock alternatively while operating the electronic device and a cycle of the second clock is larger than a cycle of the first clock;
- and
- a synchronizer, receiving the input clock and a reset signal, responding to the reset signal to output a clock shaping signal to the clock shaper;
- the reset signal being synchronized as the system reset signal according to the input clock;
- after the clock shaping signal is outputted, the system reset signal being outputted to the operating unit;
- wherein if the clock shaper does not receive the clock shaping signal, the first clock is outputted as the system clock;
- and if the clock shaper receives the clock shaping signal, the second clock is outputted as the system clock.
Dependencies are inferred from the claim text.