Multiplexing device including a hardwired multiplexer in a programmable logic device

A multiplexing device comprising:

• a hardwired multiplexer comprising a plurality of data signal input terminals and a plurality of select signal terminals;
• a first plurality of logic elements (LEs) comprising a first plurality of LE output terminals;
• and
• at least one LE comprising a plurality of LE input terminals,
• wherein the plurality of data signal input terminals are coupled to the first plurality of LE output terminals and the plurality of select signal terminals are coupled to the plurality of LE input terminals.

A method of multiplexing a plurality of data input signals, comprising:

• receiving the plurality of data input signals from one of (1) a plurality of block input lines and (2) a plurality of functional element input terminals;
• receiving a plurality of select signals;
• using a hardwired multiplexer to select at least one data signal from the plurality of data input signals;
• and
• outputting the at least one data signal,
• wherein the receiving the plurality of select signals comprises receiving the plurality of select signals from one of (1) a second plurality of functional element input terminals and (2) a plurality of functional element output terminals.

A method of multiplexing a plurality of data input signals comprising:

• receiving the plurality of data input signals;
• using a first plurality of logic elements (LEs) to select a first subset of data input signals from the plurality of data input signals;
• receiving the first subset of data input signals at a hardwired multiplexer;
• using the hardwired multiplexer to select at least one data signal from the first subset of data input signals;
• and
• outputting the at least one data signal.