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US 7,253,524 B2Granted
Copper interconnects
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsZhen-Cheng Wu, Tzu-Jen Chou, Weng Chang, Yung-Cheng Lu, Syun-Ming Jang, Mong-Song Liang
Life of this patent
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Abstract
A semiconductor substrate has a first copper layer, on which an etch stop layer and a dielectric layer are successively formed. A second copper layer penetrates the dielectric layer and the etch stop layer to electrically connect to the first metal layer. The etch stop layer has a dielectric constant smaller than 3.5, and the dielectric layer has a dielectric constant smaller than 3.0.
Claims6
A semiconductor device, comprising:
- a semiconductor substrate;
- a first metal layer formed overlying the semiconductor substrate;
- a composite etch stop layer, comprising a first etch stop layer overlying a second etch stop layer, formed overlying the first metal layer and the semiconductor substrate;
- a dielectric layer formed overlying the etch stop layer;
- and
- a second metal layer penetrating the dielectric layer and the etch stop layer and electrically connected to the first metal layer;
- wherein, the etch stop layer has a dielectric constant smaller than 3.5;
- wherein, the dielectric layer has a dielectric constant smaller than 3.0;
- wherein the dielectric layer has a tensile stress approximating to the compressive stress of the etch stop layer;
- wherein the first etch stop layer is a SiCO film, and the second etch stop layer is a SiCO film;
- wherein a first etching selectivity S1 of the first etch stop layer to the dielectric layer, and a second etching selectivity S2 of the second etch stop layer to the dielectric layer satisfy the formula:
- S1≠S2.
9 more elements
A fabrication method for a semiconductor device, comprising the steps of:
- providing a semiconductor substrate having a first metal layer;
- forming an etch stop layer overlying the first metal layer and the semiconductor substrate, wherein the etch stop layer has a dielectric constant smaller than 3.5;
- forming a dielectric layer overlying the etch stop layer, wherein the dielectric layer has a dielectric constant smaller than 3.0;
- forming an opening which penetrates the dielectric layer and the etch stop layer and exposes the first metal layer;
- and
- forming a second metal layer in the opening, in which the second metal layer is electrically connected to the first metal layer, wherein the etch stop layer is a SiOC layer, and forming the etch stop layer is by a plasma enhanced chemical vapor deposition having:
- SiH—(CH3)3 with a flow rate of 50˜300 sccm;
- CO2 with a flow rate of 300˜500 sccm;
- a process temperature of 350˜400° C.;
- a process pressure of 8˜10 Torr;
- a high-frequency (HF) RF power of 300˜500 W;
- and
- a low-frequency (LF) RF power of 60˜200 W.
10 more elements
Dependencies are inferred from the claim text.