Semiconductor package with a flip chip on a solder-resist leadframe
AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsChien Liu, Hsueh-Te Wang, Meng-Jen Wang, Chi-Hao Chiu, Tai-Yuan Huang
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AssigneeAdvanced Semiconductor Engineering, Inc.
InventorsChien Liu, Hsueh-Te Wang, Meng-Jen Wang, Chi-Hao Chiu, Tai-Yuan Huang
Estimating the term…
A semiconductor package includes a flip chip mounted on a plurality of leads and encapsulated by a molding compound. The upper surfaces of the leads includes a plurality of bump-bonding regions at the fan-in ends of the leads, and the lower surfaces of the leads include a plurality of outer connecting regions at the fan-out ends of the leads. A plurality of indentations are formed at the upper surfaces of the leads and adjacent to the corresponding bump-bonding regions so as to avoid solder contamination on the leads. After molding, the indentations are filled with the molding compound. Preferably, the indentations have a reversed “Ω”-shaped profile to prevent bumps of the flip chip from excessively wetting over the other portions of the leads to firmly fix the fan-in ends of the leads.
A semiconductor package comprising:
A leadframe for semiconductor packages, comprising a plurality of leads, each having an upper surface and an opposing lower surface, wherein the upper surfaces of the leads include a plurality of bump-bonding regions at one ends of the leads, the lower surfaces of the leads include a plurality of outer connecting regions at another ends of the leads, wherein the leads have a plurality of indentations formed at the upper surfaces of the leads, the indentations are adjacent to the corresponding bump-bonding regions, wherein a back tape is attached to the lower surfaces of the leads.
Dependencies are inferred from the claim text.