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US 7,253,504 B1Granted
Integrated circuit package and method
AssigneeAdvanced Micro Devices, Inc.
InventorsJun Zhai, Jinsu Kwon, Richard C. Blish, II
Life of this patent
Estimating the term…
Abstract
An integrated circuit package includes a substrate having a central axis dividing the substrate into an upper half and a lower half and an integrated circuit coupled to the substrate. A layer is provided within the substrate in the lower half thereof that is configured to resist warpage of the integrated circuit package, the layer provided a distance from the central axis.
Claims22
An integrated circuit package comprising:
- a substrate having a central axis dividing the substrate into an upper half and a lower half;
- an integrated circuit coupled to the substrate;
- and
- a layer provided within the substrate at a distance from the central axis and within the lower half of the substrate;
- wherein the thickness and position of the layer are configured to resist warpage of the integrated circuit package due to thermal stresses, the thickness of the layer being between approximately 50 μm and 150 μm.
2 more elements
A flip-chip integrated circuit package comprising:
- a substrate comprising a material having a first coefficient of thermal expansion, the substrate having a top half and a bottom half;
- an integrated circuit coupled to the top half of the substrate and having a second coefficient of thermal expansion less than that of the first coefficient of thermal expansion;
- and
- a warpage control layer provided in the bottom half of the substrate, the warpage control layer comprising a material configured to resist bending of the flip-chip integrated circuit package and having a thickness of between approximately 50 μm and 200 μm.
1 more element
A method for producing an integrated circuit package, comprising:
- providing a substrate comprising at least one of a ceramic material and an organic material;
- attaching an integrated circuit to a surface of the substrate;
- wherein the substrate has an axis which divides the substrate into a top half and a bottom half;
- and
- wherein the substrate includes a material configured to offset warpage of the integrated circuit package, the material provided within the bottom half of the substrate and having a thickness of between approximately 50 μm and 150 μm.
2 more elements
Dependencies are inferred from the claim text.