Flash memory device having a graded composition, high dielectric constant gate insulator
AssigneeMicron Technology, Inc.
InventorsLeonard Forbes, Kie Y. Ahn
Life of this patent
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Abstract
A graded composition, high dielectric constant gate insulator is formed between a substrate and floating gate in a flash memory cell transistor. The gate insulator is comprised of amorphous germanium or a graded composition of germanium carbide and silicon carbide. If the composition of the gate insulator is closer to silicon carbide near the substrate, the electron barrier for hot electron injection will be lower. If the gate insulator is closer to the silicon carbide near the floating gate, the tunnel barrier can be lower at the floating gate.
Claims16
A flash memory transistor comprising:
- a substrate having a pair of implanted source/drain regions, the source/drain regions having a different conductivity than the remainder of the substrate;
- a high dielectric constant gate insulator formed over the substrate and substantially between the pair of source/drain regions, the gate insulator comprising a graded composition of silicon carbide to germanium carbide;
- a floating gate formed over the gate insulator;
- an insulator layer formed over the floating gate;
- and
- a control gate formed over the insulator layer.
A flash memory transistor comprising:
- a substrate having a pair of source/drain regions, the source/drain regions having a different conductivity than the remainder of the substrate, a channel region formed between each pair of source/drain regions;
- a graded composition, high dielectric constant gate insulator formed over the channel region, the gate insulator having a dielectric constant that is greater than 3.9 and comprised of a graded composition of silicon carbide to germanium carbide;
- a floating gate formed over the gate insulator;
- an oxide insulator formed over the floating gate;
- and
- a control gate formed over the oxide insulator.
A flash memory transistor comprising:
- a substrate having a pair of source/drain regions, the source/drain regions having a different conductivity than the remainder of the substrate, a channel region formed between each pair of source/drain regions;
- a high dielectric constant gate insulator, having a dielectric constant greater than 3.9, formed over the channel region, the gate insulator comprised of amorphous germanium carbide;
- a floating gate formed over the gate insulator;
- an oxide insulator formed over the floating gate;
- and
- a control gate formed over the oxide insulator.
A flash memory array comprising:
- a substrate having a plurality of pairs of source/drain regions, the plurality of source/drain regions having a different conductivity than the remainder of the substrate;
- a graded composition gate insulator formed over the substrate and substantially between each pair of the plurality of source/drain regions, the gate insulator having a dielectric constant that is greater than 3.9 and comprised of a graded composition of silicon carbide and germanium carbide;
- a floating gate layer formed over each of the gate insulators;
- an oxide insulator formed over each of the floating gate layers;
- and
- a control gate formed over each of the oxide insulators.
An electronic system comprising:
- a processor that generates control signals;
- and
- a memory array coupled to the processor, the array comprising:
- a substrate having a plurality of pairs of source/drain regions, the plurality of source/drain regions having a different conductivity than the remainder of the substrate;
- a graded composition gate insulator formed over the substrate and substantially between each pair of the plurality of source/drain regions, the gate insulator having a dielectric constant that is greater than 3.9 and comprised of a graded composition of silicon carbide and germanium carbide;
- a floating gate layer formed over each of the gate insulators;
- an oxide insulator formed over each of the floating gate layers;
- and
- a control gate formed over each of the oxide insulators.
Dependencies are inferred from the claim text.