Electrically programmable memory element

An electrically operated memory element comprising:

• a first dielectric layer having an opening therethrough;
• a first conductive layer lining the sidewall surface of the opening of said first dielectric layer;
• a second dielectric layer formed over said first conductive layer within said opening;
• a second conductive layer formed over a top surface of said first conductive layer and a top surface of said second dielectric layer;
• a third dielectric layer having an opening therethrough, at least portion of said opening of said third dielectric layer overlying said second dielectric layer;
• and
• a programmable resistance material disposed in said opening and in electrical communication with said second conductive layer.