Process for assembling three-dimensional systems on a chip and structure thus obtained

A process for fabricating one or more active device layers on a host circuit substrate, the process comprising:

• providing a host circuit substrate having one or more host circuits and having one or more host circuit electrical contacts electrically connected to at least one host circuit;
• fabricating one or more active device structures having two opposing surfaces on a growth substrate to provide a first active device layer;
• forming a plurality of active device electrical contacts on the first active device layer, at least one active device electrical contact being electrically connected to one surface of at least one active device structure, another active device electrical contact being electrically connected to another surface of the at least one active device structure;
• coating the first active device layer with a dielectric layer;
• bonding the dielectric layer on the first active device layer to the host circuit substrate;
• removing the growth substrate from the active device layer;
• and
• fabricating at least one electrical connection between at least one host circuit electrical contact and at least one active device electrical contact.

A three-dimensional electronic structure comprising:

• a host substrate having one or more host circuits;
• a first active device layer bonded to the host substrate, the first active device layer comprising one or more active device structures having two opposing surfaces grown on a growth substrate and embedded in one or more dielectric layers, the growth substrate being removed after the first active device layer is bonded to the host substrate;
• and
• one or more interconnects electrically connecting two opposing surfaces of one or more active device structures to one or more host circuits.

A process for fabricating one or more active device layers on a host circuit substrate, the process comprising:

• providing a host circuit substrate having one or more host circuits and having one or more host circuit electrical contacts electrically connected to at least one host circuit;
• fabricating one or more active device structures on a growth substrate to provide a first active device layer;
• coating the active device structures with a device structure dielectric layer with a top side and a bottom side;
• fabricating one or more via holes in the device structure dielectric layer;
• and
• metallizing one or more via holes to provide the one or more active device electrical contacts, the one or more active device electrical contacts being electrically connected to at least one active device structure;
• coating the first active device layer with a dielectric layer;
• bonding the dielectric layer on the first active device layer to the host circuit substrate;
• removing the growth substrate from the active device layer;
• and
• fabricating at least one electrical connection between at least one host circuit electrical contact and at least one active device electrical contact.