Method of manufacturing NOR-type mask ROM device and semiconductor device including the same

A method of manufacturing a semiconductor device, the method comprising:

• forming a gate insulating layer on a semiconductor substrate of a first conductivity type, the semiconductor substrate including a mask read only memory (IROM) device region and a high voltage device region;
• forming a plurality of gate electrodes in each of the mask ROM device region and the high voltage device region on the gate insulating layer;
• a first gate electrode for an OFF cell and a second gate electrode for an ON cell in the mask ROM device region,
• forming a mask islanded double diffused drain (MIDDD) type lightly doped region in the high voltage device region by implanting impurities of a second conductivity type, opposite the first conductivity type, only into the high voltage device region;
• coding a mask ROM by forming a plurality of source/drain regions by selectively implanting impurities of the second conductivity type only into the mask ROM device region to define the ON cell and the OFF cell in the mask ROM device region, wherein the coding of the mask ROM includes implanting impurities of the second conductivity type into a portion of the semiconductor substrate adjacent only to a first side of the first gate electrode for the OFF cell and into portions of the semiconductor substrate respectively adjacent to both sides of the second gate electrode for the ON cell, wherein the semiconductor substrate disposed directly under the first gate electrode for the OFF CELL always remains off;
• forming an MIDDD-type heavily doped region in the high voltage device region by additionally implanting impurities of the second conductivity type into the MIDDD-type lightly doped region of the high voltage device region;
• and
• selectively additionally implanting impurities of the second conductivity type only into a source/drain region having a bit line contact in the mask ROM device region concurrently with the additional implanting of impurities of the second conductivity type for forming the MIDDD-type heavily doped region in the high voltage device region.