Manufacturing method for semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShigeharu Monoe, Takashi Yokoshima, Shinya Sasagawa
Estimating the term…
With respect to the selective ratio in the etching process, it is an object to give design freedom in size of an LDD overlapped with a gate electrode, which is formed in a self-aligning manner, by performing an etching process under an etching condition that has a high selective ratio between a mask pattern and metal such as titanium in forming a first conductive layer pattern. A laminated structure comprising a lower first conductive layer and an upper second conductive layer is formed over a semiconductor layer with a gate insulating film interposed therebetween, a mask pattern is formed on the laminated structure, a condition that an etching rate of the mask pattern is fast is used and the second conductive layer and the first conductive layer are etched to form a tapered first conductive layer pattern, and the second conductive layer in the first conductive layer pattern is selectively etched in accordance with the left mask pattern to form a second conductive layer pattern in which a width of the first conductive layer is longer than that of the second conductive layer.
A method for manufacturing a semiconductor device, comprising the steps of:
A method for manufacturing a semiconductor device, comprising the steps of:
Dependencies are inferred from the claim text.