Short channel semiconductor device fabrication
AssigneeTexas Instruments Incorporated
InventorsJean-Pierre Colinge, Weize Xiong
Life of this patent
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Abstract
The formation of one or more accumulation mode multi gate transistor devices is disclosed. The devices are formed so that short channel effects are mitigated. In particular, one more types of dopant materials are implanted in a channel region, an extension region and/or source/drain regions to mitigate the establishment of a conduction path and the accumulation of electrons in the channel region that can result in an unwanted leakage current.
Claims20
A method of forming a multi gate transistor device, comprising:
- performing a first implantation process to achieve a first doping concentration within a semiconductor substrate;
- performing a second implantation process to achieve a second doping concentration within an area of the semiconductor substrate wherein a channel region of the transistor is to be established, the second implantation process merely doping a portion of the area;
- forming a multi gate dielectric over the area of the semiconductor substrate wherein the channel region of the transistor is established;
- forming a multi gate electrode over the gate dielectric;
- performing a third implantation process to establish a first extension region adjacent to a first side of the channel region and a second extension region adjacent to a second side of the channel region, the first and second extension regions having a third doping concentration;
- and
- performing a fourth implantation process to establish a source region adjacent to the first extension region and a drain region adjacent to the second extension region, the source and drain regions having a fourth doping concentration, wherein the fourth doping concentration is greater than the third doping concentration, the third doping concentration is greater than the second doping concentration and the second doping concentration is greater than the first doping concentration.
A method of forming a multi gate transistor device, comprising:
- performing a first implantation process to achieve a first doping concentration within a semiconductor substrate;
- performing a second implantation process to achieve a second doping concentration within an area of the semiconductor substrate wherein a channel region of the transistor is to be established;
- forming a multi gate dielectric over the area of the semiconductor substrate wherein the channel region of the transistor is established;
- forming a multi gate electrode over the gate dielectric;
- performing a third implantation process to establish a first extension region adjacent to a first side of the channel region and a second extension region adjacent to a second side of the channel region, the third implantation process establishing a third doping concentration, and the third implantation process merely doping a portion of one or both of the first extension region and the second extension region;
- and
- performing a fourth implantation process to establish a source region adjacent to the first extension region and a drain region adjacent to the second extension region, the source and drain regions having a fourth doping concentration, wherein the fourth doping concentration is greater than the third doping concentration, the third doping concentration is greater than the second doping concentration and the second doping concentration is greater than the first doping concentration.
A method of forming a multi gate transistor device, comprising:
- performing a first implantation process to achieve a first doping concentration within a semiconductor substrate;
- performing a second implantation process to achieve a second doping concentration within an area of the semiconductor substrate wherein a channel region of the transistor is to be established;
- forming a multi gate dielectric over the area of the semiconductor substrate wherein the channel region of the transistor is established;
- forming a multi gate electrode over the gate dielectric;
- and
- performing a fourth implantation process to establish a source region adjacent to a first side of the channel region and a drain region adjacent to a second side of the channel region, the fourth implantation process establishing a fourth doping concentration, and the fourth implantation process merely doping a portion of one or both of the source and drain regions, wherein the fourth doping concentration is greater than the second doping concentration and the second doping concentration is greater than the first doping concentration.
A method of forming a multi gate transistor device, comprising:
- performing a first implantation process to achieve a first doping concentration within a semiconductor substrate;
- performing a second implantation process to achieve a second doping concentration within an area of the semiconductor substrate wherein a channel region of the transistor is to be established, the second implantation process merely doping a portion of the area;
- forming a multi gate dielectric over the area of the semiconductor substrate wherein the channel region of the transistor is established;
- forming a multi gate electrode over the gate dielectric;
- performing a third implantation process to establish a first extension region adjacent to a first side of the channel region and a second extension region adjacent to a second side of the channel region, the first and second extension regions having a third doping concentration;
- and
- forming a metal source region adjacent to the first extension region and a metal drain region adjacent to the second extension region, wherein the third doping concentration is greater than the second doping concentration and the second doping concentration is greater than the first doping concentration.
A method of forming a multi gate transistor device, comprising:
- performing a first implantation process to achieve a first doping concentration within a semiconductor substrate;
- performing a second implantation process to achieve a second doping concentration within an area of the semiconductor substrate wherein a channel region of the transistor is to be established;
- forming a multi gate dielectric over the area of the semiconductor substrate wherein the channel region of the transistor is established;
- forming a multi gate electrode over the gate dielectric;
- performing a third implantation process to establish a first extension region adjacent to a first side of the channel region and a second extension region adjacent to a second side of the channel region, the third implantation process establishing a third doping concentration, and the third implantation process merely doping a portion of one or both of the first extension region and the second extension region;
- and
- forming a metal source region adjacent to the first extension region and a metal drain region adjacent to the second extension region, wherein the third doping concentration is greater than the second doping concentration and the second doping concentration is greater than the first doping concentration.
Dependencies are inferred from the claim text.