Guard ring for improved matching
AssigneeAgere Systems Inc.
InventorsDaniel Charles Kerr, Roscoe T. Luce, Michele Marie Jamison, Alan Sangone Chen, William A. Russell
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AssigneeAgere Systems Inc.
InventorsDaniel Charles Kerr, Roscoe T. Luce, Michele Marie Jamison, Alan Sangone Chen, William A. Russell
Estimating the term…
A semiconductor manufacturing method comprises forming a leveling guard ring defining an interior area into which are fabricated one or more devices. In certain aspects, two or more matched devices, such as in a common centroid layout, are fabricated in the interior area. The guard ring is formed on at least one particular layer for a particular processing step. By the guard ring overwhelming the effect of local features' elevation differences, photoresist thereafter applied consequently has a more uniform height across the interior area, resulting in more uniform devices. A plurality of guard rings may be used that enclose respective arrays of matched devices arranged over the surface of a semiconductor wafer. Based on the equalizing effect by each of the guard rings, the respective devices arranged in the interior areas are more evenly matched to equivalent devices in far-spaced guard rings. Thus, local and global matching are achieved.
During fabrication of an integrated circuit on a semiconductor wafer, a method for reducing photoresist thickness variation within an enclosed area of a patterned circuit on the wafer comprising the steps of:
Dependencies are inferred from the claim text.