Synthesis of cyclic combinational circuits
AssigneeCalifornia Institute of Technology
InventorsMarcus D. Riedel, Jehoshua Bruck
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Abstract
A method for the synthesis of multi-level combinational circuits with cyclic topologies. The techniques, applicable in logic synthesis, and in particular in the structuring phase of logic synthesis, optimize a multi-level description, introducing feedback and potentially optimizing the network.
Claims69
A method of producing a cyclic combinational circuit, the method comprising:
- determining cyclic parameters;
- and
- synthesizing the cyclic combinational circuit in accordance with the determined cyclic parameters;
- wherein the synthesizing comprises creating a network with no cycles, introducing cycles into the network, and determining if the network is combinational, and repeating introducing cycles into the network until a desired cyclic combinational circuit is implemented.
A method of producing a cyclic combinational circuit, the method comprising:
- determining cyclic parameters;
- and
- synthesizing the cyclic combinational circuit in accordance with the determined cyclic parameters;
- wherein the method of producing a cyclic combinational circuit is optimized, and
- wherein the cyclic combinational circuit is optimized with regard to fault tolerance.
A method of producing a cyclic combinational circuit, the method comprising:
- determining cyclic parameters;
- and
- synthesizing the cyclic combinational circuit in accordance with the determined cyclic parameters;
- wherein the synthesizing comprises:
- creating a densely interconnected network;
- excluding edges from the densely interconnected network;
- determining if the densely interconnected network is combinational;
- and
- repeating the excluding edges from the densely interconnected network until a desired cyclic combinational circuit is implemented.
A method of logic synthesis, the method comprising:
- determining cyclic parameters;
- and
- using the determined cyclic parameters during synthesis of a cyclic combinational circuit;
- wherein synthesis comprises creating a network with no cycles, introducing cycles into the network, and determining if the network is combinational, and repeating introducing cycles into the network until a desired cyclic combinational circuit is implemented.
A logic synthesizer comprising:
- a logic for determining a set of cyclic parameters;
- and
- a processor configured to synthesize a cyclic combinational circuit in accordance with the determined set of cyclic parameters;
- wherein the processor creates a network with no cycles, and then introduces cycles into the network and determines if the network is combinational, and then it repeats introducing cycles into the network until a desired cyclic combinational circuit is implemented.
A logic synthesizer comprising:
- a logic for determining a set of cyclic parameters;
- and
- a processor configured to synthesize a cyclic combinational circuit in accordance with the determined set of cyclic parameters;
- wherein the synthesized cyclic combinational circuit is optimized;
- and
- wherein the cyclic combinational circuit is optimized with regard to fault tolerance.
A logic synthesizer comprising:
- a logic for determining a set of cyclic parameters;
- and
- a processor configured to synthesize a cyclic combinational circuit in accordance with the determined set of cyclic parameters;
- wherein the processor creates a densely interconnected network, and then excludes edges from the densely interconnected network and determines if the densely interconnected network is combinational, and then repeats excluding edges from the densely interconnected network until a desired cyclic combinational circuit is implemented.
Dependencies are inferred from the claim text.