Address watch breakpoints in a hardware synchronization range
AssigneeInternational Business Machines Corporation
InventorsJohn Charles Brock, Gregory Alan Chaney, Kevin J. Erickson
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Abstract
A method, apparatus, system, and signal-bearing medium that in an embodiment determine whether an instruction at which an address watch breakpoint occurs is within a hardware synchronization mechanism range in a program. If the determination is true, a special breakpoint is set following the hardware synchronization mechanism range, the address watch breakpoint is temporarily disabled, and the machine state is saved. When the program encounters the special breakpoint following the end of the hardware synchronization mechanism range, the saved machine state is presented. In this way, endless looping in programs protected by hardware synchronization mechanisms may be prevented.
Claims15
A method comprising:
- determining whether an instruction at which an address watch breakpoint occurs is within a hardware synchronization mechanism range in a program;
- and
- if the determining is true, setting a special breakpoint following the hardware synchronization mechanism range;
- temporarily disabling the address watch breakpoint if the determining is true;
- saving a machine state if the determining is true;
- and
- determining whether a processor storage reservation indicator is set after encountering an end of the hardware synchronization mechanism range.
An apparatus comprising:
- means for determining whether an instruction at which an address watch breakpoint occurs is within a hardware synchronization mechanism range in a program;
- means for setting a special breakpoint following the hardware synchronization mechanism range if the means for determining is true;
- means for temporarily disabling the address watch breakpoint and saving a machine state if the means if the means for determining is true;
- and means for determining whether a processor storage reservation indicator is set after encountering an end of the hardware synchronization mechanism range.
A storage medium encoded with instructions, wherein the instructions when executed comprise:
- determining whether an instruction at which an address watch breakpoint occurs is within a hardware synchronization mechanism range in a program;
- setting a special breakpoint following the hardware synchronization mechanism range if the determining is true;
- temporarily disabling the address watch breakpoint if the determining is true;
- saving a machine state if the determining is true;
- and determining whether a processor storage reservation indicator is set after encountering an end of the hardware synchronization mechanism range.
A computer system comprising:
- a processor;
- and a main memory encoded with instructions, wherein the instructions when executed on the processor comprise:
- determining whether an instruction at which an address watch breakpoint occurs is within a hardware synchronization mechanism range in a program,
- setting a special breakpoint following the hardware synchronization mechanism range if the determining is true,
- temporarily disabling the address watch breakpoint if the determining is true,
- saving a machine state if the determining is true, and determining whether a processor storage reservation indicator is set after encountering an end of the hardware synchronization mechanism range.
Dependencies are inferred from the claim text.