Multiprocessor code fix using a local cache
AssigneeInternational Business Machines Corporation
InventorsKenneth J. Goodnow, Riyon W. Harding
Life of this patent
Estimating the term…
Abstract
Operating code fixes are supplied to multiple processors utilizing the same operating code by storing the correction code fixes in a central RAM, and distributing the code fixes over a dedicated code fix bus to a local cache for each processor. The first processor encountering a code fix requests the code fix from the RAM, which then distributes the code fix over the code fix bus to all of the local caches which are automatically updated with the new code. The system is particularly applicable to an integrated circuit having multiple processors fabricated on a chip, wherein the RAM is on-chip and is connected to an off-chip EEPROM that loads corrected code fixes to the on-chip RAM at power-up.
Claims20
In an integrated circuit having multiple processors with each processor having a ROM (read only memory) for storing operating code for controlling operation of the processor, a system for replacing defective operating code stored in the ROM with replacement code fixes comprising:
- a RAM (random access memory) for storing replacement code fixes to replace the defective operating code;
- a code fix local memory for each of the processors;
- a code fix bus coupled to each of the code fix local memories and the RAM;
- and
- means for loading the replacement code fixes over the code fix bus into all of the code fix local memories whenever one of the processors encounters a predetermined jump code during execution of the defective operating code.
A method for replacing defective operating code, for controlling operation of a processor and stored in a ROM (read only memory), with replacement code fixes, in an integrated circuit having multiple processors with each processor having a ROM for storing operating code, the method comprising:
- storing replacement code fixes in a RAM (random access memory) to replace the defective operating code;
- storing replacement code fixes in a code fix local memory for each of the processors coupled by a code fix bus to the RAM;
- and
- loading the replacement code fixes over the code fix bus into all of the code fix local memories whenever one of the processors encounters a predetermined jump code during execution of the defective operating code.
Dependencies are inferred from the claim text.