Clock generating device and method for executing overclocking operation

A clock tuning method for utilizing a clock generator to execute an overclocking operation on at least one of elements disposed on a printed circuited board (PCB), the method comprising:

• performing the overclocking operation on one of the elements, comprising:
• increasing a frequency of a clock signal generated by the clock generator to operate the element corresponding to the clock signal;
• reading a signal generated by a chip coupled to the PCB to determine whether one of the elements works normally or not;
• repeating the step of increasing the frequency and the step of reading the signal until one of the elements cannot work normally, meanwhile, the frequency is viewed as an utmost frequency of the clock signal;
• and
• resetting all the elements and operating the element corresponding to the clock signal according to a safe frequency of the clock signal, wherein the safe frequency is lower than the utmost frequency;
• wherein the step of resetting all the elements further comprises:
• repeating the step of performing overclocking operation to perform the overclocking operation on the element that have not been performed overclocking operation.

A device for executing an overclocking operation on a plurality of elements disposed on a printed circuit board (PCB), the device comprising:

• a plurality of registers for storing a plurality of values respectively corresponding to frequencies of a plurality of clock signals, the plurality of clock signals being used for operating the plurality of elements, the plurality of registers comprising:
• a first register storing a first value for operating a first element among the elements;
• and
• a second register storing a second value for operating a second element among the elements;
• a clock generator for generating the plurality of clock signals according to the values stored in the plurality of registers;
• and
• a control circuit for executing the overclocking operation on the first element and the second element, the control circuit executing the following steps:
• executing the overclocking operation on the first element, comprising:
• adjusting the first value stored in the first register until detecting/receiving an indication signal representing that one of the elements disposed on the PCB cannot works normally, and thereby determining the first value as a first utmost value corresponding to a first utmost frequency;
• and
• updating the first value stored in the first register from the first utmost value to a first safe value corresponding to a first safe frequency, the first safe frequency smaller than the first utmost frequency;
• and
• executing the overclocking operation on the second element, comprising:
• adjusting the second value stored in the second register until detecting/receiving the indication signal representing that one of the elements disposed on the PCB cannot works normally, and thereby determining the second value as a second utmost value corresponding to a second utmost frequency;
• and
• updating the second value stored in the second register from the second utmost value to a second safe value corresponding to a second safe frequency, the second safe frequency smaller than the second utmost frequency.

A device for executing an overclocking operation on a plurality of elements disposed on a printed circuit board (PCB), the device comprising:

• a plurality of registers for storing a plurality of values respectively corresponding to frequencies of a plurality of clock signals, the plurality of clock signals being used for operating the plurality of elements, the plurality of registers comprising:
• a first register storing a first value for operating a first element among the elements;
• and
• a second register storing a second value for operating a second element among the elements;
• a clock generator for generating the plurality of clock signals according to the values stored in the plurality of registers;
• and
• a control circuit for executing the overclocking operation on the first element and the second element, the control circuit executing the following steps:
• executing the overclocking operation on the first element, comprising:
• adjusting the first value stored in the first register;
• monitoring whether one of the elements disposed on the PCB cannot works normally;
• and
• when one of the elements disposed on the PCB cannot works normally, determining the first value as a first utmost value corresponding to a first utmost frequency and consequently updating the first value stored in the first register from the first utmost value to a first safe value corresponding to a first safe frequency, the first safe frequency smaller than the first utmost frequency;
• and
• executing the overclocking operation on the second element after executing the overclocking operation on the first element, comprising:
• adjusting the second value stored in the second register;
• monitoring whether one of the elements disposed on the PCB cannot works normally;
• and
• when one of the elements disposed on the PCB cannot works normally, determining the second value as a second utmost value corresponding to a second utmost frequency and consequently updating the second value stored in the second register from the second utmost value to a second safe value corresponding to a second safe frequency, the second safe frequency smaller than the second utmost frequency.