Prefetching in a data processing system
AssigneeFreescale Semiconductor, Inc.
InventorsWilliam C. Moyer, Craig D. Shaw
Life of this patent
Estimating the term…
Abstract
A method and apparatus is provided for prefetching in a data processing system (10). The data processing system (10) has a bus master (14) and a memory controller (16) coupled to a bus (12). A memory (18) is coupled to the memory controller (16). In the data processing system (14) an address is driven onto the bus (12). Before the address is qualified, data corresponding to the address is prefetched. Prefetching the data before the address is qualified allows prefetches to be accomplished sooner.
Claims9
A method for prefetching in a data processing system having a bus master, a memory system, and a bus, the bus master and the memory system coupled to the bus, the method comprising:
- initiating an access to the memory system, wherein the access requires more than one clock cycle to complete;
- determining whether an unqualified address is driven on the bus, wherein the unqualified address is unqualified until accepted by the memory system as taken;
- and
- determining that the unqualified address is driven on the bus but not taken, and in response, prefetching data corresponding to the unqualified address, wherein the prefetching of the data corresponding to the unqualified address is initiated while the access to the memory system is in progress and the prefetching of the data is not related to the access to the memory system.
Dependencies are inferred from the claim text.