Sliced crossbar architecture with no inter-slice communication

A method of operating a crossbar including a plurality of slices, the method comprising:

• receiving a plurality of memory transactions to be sent over a memory bus to a memory track, the memory track including a plurality of memory banks;
• associating a priority with each of the plurality of memory transactions;
• generating a plurality of bank readiness signals indicating a readiness of each of the plurality of memory banks to accept a memory transaction;
• selecting, independently in each slice by using an arbiter included in each slice, a memory transaction from the plurality of memory transactions based on the priority associated with each of the plurality of memory transactions and the plurality of bank readiness signals;
• and
• sending the selected memory transaction over the memory bus to the memory track.

A crossbar for transmitting memory transactions from a processor to a memory, the crossbar comprising:

• a first slice comprising:
• a first buffer adapted to store a first portion of a first memory transaction and a first portion of a second memory transaction,
• a first arbiter adapted to independently select either the first memory transaction or the second memory transaction to provide a selected memory transaction, and
• a first multiplexer adapted to transmit the first portion of the selected memory transaction to the memory;
• and
• a second slice comprising;
• a second buffer adapted to store a second portion of the first memory transaction and a second portion of the second memory transaction,
• a second arbiter adapted to independently select the selected memory transaction, and
• a second multiplexer adapted to transmit the second portion of the selected memory transaction to the memory.

An apparatus for connecting multiple processors to multiple memories, the apparatus comprising:

• at least one processor adapted to process memory transactions;
• at least one switch coupled to the at least one processor, wherein the switch comprises at least a first slice and a second slice, and the first slice comprises a first arbiter;
• and
• at least one memory coupled to the switch, wherein the first slice is adapted to:
• receive a plurality of portions of a plurality of memory transactions,
• select a plurality of portions of the plurality of memory transactions, wherein the selection is performed in the first slice independently using the first arbiter, and
• transmit the selected plurality of portions of the plurality of memory transactions to the at least one memory without communication with the second slice.

A crossbar adapted to transmit a plurality of memory transactions from a processor to a network resource, the crossbar comprising:

• a plurality of slices;
• a buffer in each of the plurality of slices, the buffers adapted to receive portions of the plurality of memory transactions;
• an arbiter in each of the plurality of slices, the arbiters adapted to independently select one of the plurality of memory transactions based on a priority associated with each of the plurality of memory transactions;
• and
• a multiplexer in each of the plurality of slices, the multiplexers adapted to transmit the selected memory transaction to the network resource.