Refresh period generating circuit
AssigneeElpida Memory, Inc.
InventorsYutaka Ito, Nobuhiro Odaira
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AssigneeElpida Memory, Inc.
InventorsYutaka Ito, Nobuhiro Odaira
Estimating the term…
A refresh period generating circuit which generates a refresh period in refreshing a DRAM cell, comprising: an oscillation circuit which oscillates at a frequency with temperature dependence on ambient temperature; a dividing circuit which divides an oscillation output of the oscillation circuit; a temperature detector which detects the ambient temperature; and a selector which switches and selects among division outputs with respective frequencies from the dividing circuit based on an output of the temperature detector, and outputs a signal as a reference of the refresh period. The temperature dependence in the oscillation circuit includes a positive temperature coefficient in a predetermined temperature range, and does not include a positive temperature coefficient out of the predetermined temperature range. The selector switches the division outputs out of the predetermined temperature range.
A refresh period generating circuit which generates a refresh period in refreshing a DRAM cell, comprising:
A refresh period generating circuit, which generates a refresh period in refreshing a DRAM cell, comprising:
A refresh period generating circuit which generates a refresh period in refreshing a DRAM cell, comprising:
Dependencies are inferred from the claim text.