Semiconductor device that initializes memory cells of an activated wordline group

A semiconductor device comprising a plurality of memory cells connected to M wordlines, the semiconductor device comprising:

• a control signal generation circuit, which generates first and second control signals in response to an activated setting signal and an initial data value during an initial value setting operation;
• a first power supply, which precharges bitlines to a power supply voltage level in response to the first control signal;
• a second power supply, which precharges complementary bitlines to the power supply voltage level in response to the second control signal;
• and
• a row decoder, which activates groups of wordlines based on the setting signal and a selection address, each of the groups of wordlines comprising M/2N wordlines where N is a total number of wordlines in the semiconductor device, and N is the size in bits of the selection address.

A method for initializing memory cells, comprising:

• generating, at a control signal generation circuit, first and second control signals in response to an activated setting signal and an initial data value during an initial value setting operation;
• supplying, at a first power supply circuit, power to bitlines in response to the first control signal;
• supplying, at a second power supply circuit, power to complementary bitlines, in response to the second control signal;
• and
• selecting, at a row decoder, a group of wordlines from a plurality of wordlines in response to the setting signal and a selection address and simultaneously activating the selected group of wordlines.